commit 37bf5b7594a6784b3acb65410c670300e582e7aa
author Wenkai Du <wenkai.du@intel.com> Fri Aug 21 13:11:00 2015 -0700
committer ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> Sat Aug 22 11:00:20 2015 +0000
tree 1698841a4ad34e17160436a9b0ac82048bcf70b7
parent 7624eeca19b4f286b30c3d4ac5b44c5e9619c2c7

kunimitsu: fix kepler probing

The patch was ported from commit: glados: fix kepler probing

BUG=chrome-os-partner:44326
BRANCH=None
TEST=Built and booted kunimitsu. lscpi shows the device on bus 2.

Original-change-Id: I7fe4a707f9321b7bdec4b4be729c5d0dcce65f6e
Originally-signed-off-by: Aaron Durbin <adurbin@chromium.org>
Originally-reviewed-on: https://chromium-review.googlesource.com/294810
Change-Id: I2fb620ebff5b477a1a457a354c65229ad1092cae
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/295164
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/intel/kunimitsu/gpio.h

diff --git a/src/mainboard/intel/kunimitsu/gpio.h b/src/mainboard/intel/kunimitsu/gpio.h
index 0dbf782..f1166c8 100644
--- a/src/mainboard/intel/kunimitsu/gpio.h
+++ b/src/mainboard/intel/kunimitsu/gpio.h
@@ -23,6 +23,7 @@
 
 #include <soc/gpio.h>
 
+/* Pad configuration in ramstage. */
 static const struct pad_config gpio_table[] = {
 /* EC_PCH_RCIN */	PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
 /* LPC_LAD_0 */		PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
@@ -189,4 +190,11 @@
 /* PM_SLP_S5# */	PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
 /* LANPHYC */		/* GPD11 */
 };
+
+/* Early pad configuration in romstage. */
+static const struct pad_config early_gpio_table[] = {
+/* SRCCLKREQ2# */	PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* KEPLER */
+/* UART0_CTS# */	PAD_CFG_GPO(GPP_C11, 1, DEEP), /* EN_PP3300_KEPLER */
+};
+
 #endif

src/mainboard/intel/kunimitsu/romstage.c

diff --git a/src/mainboard/intel/kunimitsu/romstage.c b/src/mainboard/intel/kunimitsu/romstage.c
index c0d7aec..1491794 100644
--- a/src/mainboard/intel/kunimitsu/romstage.c
+++ b/src/mainboard/intel/kunimitsu/romstage.c
@@ -29,11 +29,22 @@
 #include <soc/pei_wrapper.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
+#include "gpio.h"
 #include "spd/spd.h"
 
+static void early_config_gpio(void)
+{
+	/* This is a hack for FSP because it does things in MemoryInit()
+	 * which it shouldn't be. We have to prepare certain gpios here
+	 * because of the brokenness in FSP. */
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
+
 void mainboard_romstage_entry(struct romstage_params *params)
 {
 	post_code(0x31);
+	early_config_gpio();
+
 	/* Fill out PEI DATA */
 	mainboard_fill_pei_data(params->pei_data);
 	mainboard_fill_spd_data(params->pei_data);