Skylake: Add support for DPTF
This patch adds the ASL files with the DPTF related settings and the
thermal devices enabled in the SOC. It also enables the DPTF setting
at the global NVS level.
BRANCH=None
BUG=chrome-os-partner:40855
TEST=Built for kunimitsu board. Tested to see that the thermal devices
and the participants are enumerated and can be seen in the
/sys/bus/platform/devices. Also checked the temperature readings of the
cooling devices and the thermal zones enumerated in the /sys/class/thermal.
Change-Id: I0d92ef42cff5567ea6fc566730588802d8549ce0
Signed-off-by: Shilpa Sreeramalu <shilpa.sreeramalu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/293391
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Naveenkrishna Ch <naveenkrishna.ch@intel.com>
6 files changed
