| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (c) 2019, Linaro Ltd. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> |
| #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
| #include <dt-bindings/sound/qcom,q6afe.h> |
| #include <dt-bindings/sound/qcom,q6asm.h> |
| #include "sdm845.dtsi" |
| #include "pm8998.dtsi" |
| #include "pmi8998.dtsi" |
| |
| / { |
| model = "Thundercomm Dragonboard 845c"; |
| compatible = "thundercomm,db845c", "qcom,sdm845"; |
| |
| aliases { |
| serial0 = &uart9; |
| hsuart0 = &uart6; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| dc12v: dc12v-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "DC12V"; |
| regulator-min-microvolt = <12000000>; |
| regulator-max-microvolt = <12000000>; |
| regulator-always-on; |
| }; |
| |
| gpio_keys { |
| compatible = "gpio-keys"; |
| autorepeat; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vol_up_pin_a>; |
| |
| vol-up { |
| label = "Volume Up"; |
| linux,code = <KEY_VOLUMEUP>; |
| gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| |
| user4 { |
| label = "green:user4"; |
| gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "panic-indicator"; |
| default-state = "off"; |
| }; |
| |
| wlan { |
| label = "yellow:wlan"; |
| gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "phy0tx"; |
| default-state = "off"; |
| }; |
| |
| bt { |
| label = "blue:bt"; |
| gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "bluetooth-power"; |
| default-state = "off"; |
| }; |
| }; |
| |
| hdmi-out { |
| compatible = "hdmi-connector"; |
| type = "a"; |
| |
| port { |
| hdmi_con: endpoint { |
| remote-endpoint = <<9611_out>; |
| }; |
| }; |
| }; |
| |
| lt9611_1v8: lt9611-vdd18-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "LT9611_1V8"; |
| |
| vin-supply = <&vdc_5v>; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| |
| gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| lt9611_3v3: lt9611-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "LT9611_3V3"; |
| |
| vin-supply = <&vdc_3v3>; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| // TODO: make it possible to drive same GPIO from two clients |
| // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; |
| // enable-active-high; |
| }; |
| |
| pcie0_1p05v: pcie-0-1p05v-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "PCIE0_1.05V"; |
| |
| vin-supply = <&vbat>; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| |
| // TODO: make it possible to drive same GPIO from two clients |
| // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; |
| // enable-active-high; |
| }; |
| |
| cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "CAM0_DVDD_1V2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| enable-active-high; |
| gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&cam0_dvdd_1v2_en_default>; |
| vin-supply = <&vbat>; |
| }; |
| |
| cam0_avdd_2v8: reg_cam0_avdd_2v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "CAM0_AVDD_2V8"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| enable-active-high; |
| gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&cam0_avdd_2v8_en_default>; |
| vin-supply = <&vbat>; |
| }; |
| |
| /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ |
| cam3_avdd_2v8: reg_cam3_avdd_2v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "CAM3_AVDD_2V8"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-always-on; |
| vin-supply = <&vbat>; |
| }; |
| |
| pcie0_3p3v_dual: vldo-3v3-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "VLDO_3V3"; |
| |
| vin-supply = <&vbat>; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie0_pwren_state>; |
| }; |
| |
| v5p0_hdmiout: v5p0-hdmiout-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "V5P0_HDMIOUT"; |
| |
| vin-supply = <&vdc_5v>; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <500000>; |
| |
| // TODO: make it possible to drive same GPIO from two clients |
| // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; |
| // enable-active-high; |
| }; |
| |
| vbat: vbat-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "VBAT"; |
| |
| vin-supply = <&dc12v>; |
| regulator-min-microvolt = <4200000>; |
| regulator-max-microvolt = <4200000>; |
| regulator-always-on; |
| }; |
| |
| vbat_som: vbat-som-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "VBAT_SOM"; |
| |
| vin-supply = <&dc12v>; |
| regulator-min-microvolt = <4200000>; |
| regulator-max-microvolt = <4200000>; |
| regulator-always-on; |
| }; |
| |
| vdc_3v3: vdc-3v3-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDC_3V3"; |
| vin-supply = <&dc12v>; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vdc_5v: vdc-5v-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDC_5V"; |
| |
| vin-supply = <&dc12v>; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <500000>; |
| regulator-always-on; |
| }; |
| |
| vreg_s4a_1p8: vreg-s4a-1p8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vreg_s4a_1p8"; |
| |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| vph_pwr: vph-pwr-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "vph_pwr"; |
| |
| vin-supply = <&vbat_som>; |
| }; |
| }; |
| |
| &adsp_pas { |
| status = "okay"; |
| |
| firmware-name = "qcom/sdm845/adsp.mbn"; |
| }; |
| |
| &apps_rsc { |
| pm8998-rpmh-regulators { |
| compatible = "qcom,pm8998-rpmh-regulators"; |
| qcom,pmic-id = "a"; |
| vdd-s1-supply = <&vph_pwr>; |
| vdd-s2-supply = <&vph_pwr>; |
| vdd-s3-supply = <&vph_pwr>; |
| vdd-s4-supply = <&vph_pwr>; |
| vdd-s5-supply = <&vph_pwr>; |
| vdd-s6-supply = <&vph_pwr>; |
| vdd-s7-supply = <&vph_pwr>; |
| vdd-s8-supply = <&vph_pwr>; |
| vdd-s9-supply = <&vph_pwr>; |
| vdd-s10-supply = <&vph_pwr>; |
| vdd-s11-supply = <&vph_pwr>; |
| vdd-s12-supply = <&vph_pwr>; |
| vdd-s13-supply = <&vph_pwr>; |
| vdd-l1-l27-supply = <&vreg_s7a_1p025>; |
| vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; |
| vdd-l3-l11-supply = <&vreg_s7a_1p025>; |
| vdd-l4-l5-supply = <&vreg_s7a_1p025>; |
| vdd-l6-supply = <&vph_pwr>; |
| vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; |
| vdd-l9-supply = <&vreg_bob>; |
| vdd-l10-l23-l25-supply = <&vreg_bob>; |
| vdd-l13-l19-l21-supply = <&vreg_bob>; |
| vdd-l16-l28-supply = <&vreg_bob>; |
| vdd-l18-l22-supply = <&vreg_bob>; |
| vdd-l20-l24-supply = <&vreg_bob>; |
| vdd-l26-supply = <&vreg_s3a_1p35>; |
| vin-lvs-1-2-supply = <&vreg_s4a_1p8>; |
| |
| vreg_s3a_1p35: smps3 { |
| regulator-min-microvolt = <1352000>; |
| regulator-max-microvolt = <1352000>; |
| }; |
| |
| vreg_s5a_2p04: smps5 { |
| regulator-min-microvolt = <1904000>; |
| regulator-max-microvolt = <2040000>; |
| }; |
| |
| vreg_s7a_1p025: smps7 { |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1028000>; |
| }; |
| |
| vreg_l1a_0p875: ldo1 { |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <880000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l5a_0p8: ldo5 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l12a_1p8: ldo12 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7a_1p8: ldo7 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l13a_2p95: ldo13 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <2960000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l17a_1p3: ldo17 { |
| regulator-min-microvolt = <1304000>; |
| regulator-max-microvolt = <1304000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l20a_2p95: ldo20 { |
| regulator-min-microvolt = <2960000>; |
| regulator-max-microvolt = <2968000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l21a_2p95: ldo21 { |
| regulator-min-microvolt = <2960000>; |
| regulator-max-microvolt = <2968000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l24a_3p075: ldo24 { |
| regulator-min-microvolt = <3088000>; |
| regulator-max-microvolt = <3088000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l25a_3p3: ldo25 { |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3312000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l26a_1p2: ldo26 { |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_lvs1a_1p8: lvs1 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| vreg_lvs2a_1p8: lvs2 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| }; |
| |
| pmi8998-rpmh-regulators { |
| compatible = "qcom,pmi8998-rpmh-regulators"; |
| qcom,pmic-id = "b"; |
| |
| vdd-bob-supply = <&vph_pwr>; |
| |
| vreg_bob: bob { |
| regulator-min-microvolt = <3312000>; |
| regulator-max-microvolt = <3600000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; |
| regulator-allow-bypass; |
| }; |
| }; |
| }; |
| |
| &cdsp_pas { |
| status = "okay"; |
| firmware-name = "qcom/sdm845/cdsp.mbn"; |
| }; |
| |
| &dsi0 { |
| status = "okay"; |
| vdda-supply = <&vreg_l26a_1p2>; |
| |
| ports { |
| port@1 { |
| endpoint { |
| remote-endpoint = <<9611_a>; |
| data-lanes = <0 1 2 3>; |
| }; |
| }; |
| }; |
| }; |
| |
| &dsi0_phy { |
| status = "okay"; |
| vdds-supply = <&vreg_l1a_0p875>; |
| }; |
| |
| &gcc { |
| protected-clocks = <GCC_QSPI_CORE_CLK>, |
| <GCC_QSPI_CORE_CLK_SRC>, |
| <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, |
| <GCC_LPASS_Q6_AXI_CLK>, |
| <GCC_LPASS_SWAY_CLK>; |
| }; |
| |
| &gpu { |
| zap-shader { |
| memory-region = <&gpu_mem>; |
| firmware-name = "qcom/sdm845/a630_zap.mbn"; |
| }; |
| }; |
| |
| &i2c10 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| lt9611_codec: hdmi-bridge@3b { |
| compatible = "lontium,lt9611"; |
| reg = <0x3b>; |
| #sound-dai-cells = <1>; |
| |
| interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; |
| |
| reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; |
| |
| vdd-supply = <<9611_1v8>; |
| vcc-supply = <<9611_3v3>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| lt9611_a: endpoint { |
| remote-endpoint = <&dsi0_out>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| |
| lt9611_out: endpoint { |
| remote-endpoint = <&hdmi_con>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c11 { |
| /* On Low speed expansion */ |
| label = "LS-I2C1"; |
| status = "okay"; |
| }; |
| |
| &i2c14 { |
| /* On Low speed expansion */ |
| label = "LS-I2C0"; |
| status = "okay"; |
| }; |
| |
| &mdss { |
| status = "okay"; |
| }; |
| |
| &mdss_mdp { |
| status = "okay"; |
| }; |
| |
| &mss_pil { |
| status = "okay"; |
| firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; |
| }; |
| |
| &pcie0 { |
| status = "okay"; |
| perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; |
| enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; |
| |
| vddpe-3v3-supply = <&pcie0_3p3v_dual>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie0_default_state>; |
| }; |
| |
| &pcie0_phy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l1a_0p875>; |
| vdda-pll-supply = <&vreg_l26a_1p2>; |
| }; |
| |
| &pcie1 { |
| status = "okay"; |
| perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie1_default_state>; |
| }; |
| |
| &pcie1_phy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l1a_0p875>; |
| vdda-pll-supply = <&vreg_l26a_1p2>; |
| }; |
| |
| &pm8998_gpio { |
| gpio-line-names = |
| "NC", |
| "NC", |
| "WLAN_SW_CTRL", |
| "NC", |
| "PM_GPIO5_BLUE_BT_LED", |
| "VOL_UP_N", |
| "NC", |
| "ADC_IN1", |
| "PM_GPIO9_YEL_WIFI_LED", |
| "CAM0_AVDD_EN", |
| "NC", |
| "CAM0_DVDD_EN", |
| "PM_GPIO13_GREEN_U4_LED", |
| "DIV_CLK2", |
| "NC", |
| "NC", |
| "NC", |
| "SMB_STAT", |
| "NC", |
| "NC", |
| "ADC_IN2", |
| "OPTION1", |
| "WCSS_PWR_REQ", |
| "PM845_GPIO24", |
| "OPTION2", |
| "PM845_SLB"; |
| |
| cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { |
| pins = "gpio12"; |
| function = "normal"; |
| |
| bias-pull-up; |
| drive-push-pull; |
| qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; |
| }; |
| |
| cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { |
| pins = "gpio10"; |
| function = "normal"; |
| |
| bias-pull-up; |
| drive-push-pull; |
| qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; |
| }; |
| |
| vol_up_pin_a: vol-up-active { |
| pins = "gpio6"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; |
| }; |
| }; |
| |
| &pm8998_pon { |
| resin { |
| compatible = "qcom,pm8941-resin"; |
| interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; |
| debounce = <15625>; |
| bias-pull-up; |
| linux,code = <KEY_VOLUMEDOWN>; |
| }; |
| }; |
| |
| /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ |
| &q6afedai { |
| qi2s@22 { |
| reg = <22>; |
| qcom,sd-lines = <0 1 2 3>; |
| }; |
| }; |
| |
| &q6asmdai { |
| dai@0 { |
| reg = <0>; |
| }; |
| |
| dai@1 { |
| reg = <1>; |
| }; |
| |
| dai@2 { |
| reg = <2>; |
| }; |
| |
| dai@3 { |
| reg = <3>; |
| direction = <2>; |
| is-compress-dai; |
| }; |
| }; |
| |
| &qupv3_id_0 { |
| status = "okay"; |
| }; |
| |
| &qupv3_id_1 { |
| status = "okay"; |
| }; |
| |
| &sdhc_2 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; |
| |
| vmmc-supply = <&vreg_l21a_2p95>; |
| vqmmc-supply = <&vreg_l13a_2p95>; |
| |
| bus-width = <4>; |
| cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &sound { |
| compatible = "qcom,db845c-sndcard"; |
| pinctrl-0 = <&quat_mi2s_active |
| &quat_mi2s_sd0_active |
| &quat_mi2s_sd1_active |
| &quat_mi2s_sd2_active |
| &quat_mi2s_sd3_active>; |
| pinctrl-names = "default"; |
| model = "DB845c"; |
| audio-routing = |
| "RX_BIAS", "MCLK", |
| "AMIC1", "MIC BIAS1", |
| "AMIC2", "MIC BIAS2", |
| "DMIC0", "MIC BIAS1", |
| "DMIC1", "MIC BIAS1", |
| "DMIC2", "MIC BIAS3", |
| "DMIC3", "MIC BIAS3", |
| "SpkrLeft IN", "SPK1 OUT", |
| "SpkrRight IN", "SPK2 OUT", |
| "MM_DL1", "MultiMedia1 Playback", |
| "MM_DL2", "MultiMedia2 Playback", |
| "MM_DL4", "MultiMedia4 Playback", |
| "MultiMedia3 Capture", "MM_UL3"; |
| |
| mm1-dai-link { |
| link-name = "MultiMedia1"; |
| cpu { |
| sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; |
| }; |
| }; |
| |
| mm2-dai-link { |
| link-name = "MultiMedia2"; |
| cpu { |
| sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; |
| }; |
| }; |
| |
| mm3-dai-link { |
| link-name = "MultiMedia3"; |
| cpu { |
| sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; |
| }; |
| }; |
| |
| mm4-dai-link { |
| link-name = "MultiMedia4"; |
| cpu { |
| sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; |
| }; |
| }; |
| |
| hdmi-dai-link { |
| link-name = "HDMI Playback"; |
| cpu { |
| sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; |
| }; |
| |
| platform { |
| sound-dai = <&q6routing>; |
| }; |
| |
| codec { |
| sound-dai = <<9611_codec 0>; |
| }; |
| }; |
| |
| slim-dai-link { |
| link-name = "SLIM Playback"; |
| cpu { |
| sound-dai = <&q6afedai SLIMBUS_0_RX>; |
| }; |
| |
| platform { |
| sound-dai = <&q6routing>; |
| }; |
| |
| codec { |
| sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; |
| }; |
| }; |
| |
| slimcap-dai-link { |
| link-name = "SLIM Capture"; |
| cpu { |
| sound-dai = <&q6afedai SLIMBUS_0_TX>; |
| }; |
| |
| platform { |
| sound-dai = <&q6routing>; |
| }; |
| |
| codec { |
| sound-dai = <&wcd9340 1>; |
| }; |
| }; |
| }; |
| |
| &spi2 { |
| /* On Low speed expansion */ |
| label = "LS-SPI0"; |
| status = "okay"; |
| }; |
| |
| &tlmm { |
| cam0_default: cam0_default { |
| rst { |
| pins = "gpio9"; |
| function = "gpio"; |
| |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| |
| mclk0 { |
| pins = "gpio13"; |
| function = "cam_mclk"; |
| |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| }; |
| |
| cam3_default: cam3_default { |
| rst { |
| function = "gpio"; |
| pins = "gpio21"; |
| |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| |
| mclk3 { |
| function = "cam_mclk"; |
| pins = "gpio16"; |
| |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| }; |
| |
| dsi_sw_sel: dsi-sw-sel { |
| pins = "gpio120"; |
| function = "gpio"; |
| |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| |
| lt9611_irq_pin: lt9611-irq { |
| pins = "gpio84"; |
| function = "gpio"; |
| bias-disable; |
| }; |
| |
| pcie0_default_state: pcie0-default { |
| clkreq { |
| pins = "gpio36"; |
| function = "pci_e0"; |
| bias-pull-up; |
| }; |
| |
| reset-n { |
| pins = "gpio35"; |
| function = "gpio"; |
| |
| drive-strength = <2>; |
| output-low; |
| bias-pull-down; |
| }; |
| |
| wake-n { |
| pins = "gpio37"; |
| function = "gpio"; |
| |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie0_pwren_state: pcie0-pwren { |
| pins = "gpio90"; |
| function = "gpio"; |
| |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| |
| pcie1_default_state: pcie1-default { |
| perst-n { |
| pins = "gpio102"; |
| function = "gpio"; |
| |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| |
| clkreq { |
| pins = "gpio103"; |
| function = "pci_e1"; |
| bias-pull-up; |
| }; |
| |
| wake-n { |
| pins = "gpio11"; |
| function = "gpio"; |
| |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| reset-n { |
| pins = "gpio75"; |
| function = "gpio"; |
| |
| drive-strength = <16>; |
| bias-pull-up; |
| output-high; |
| }; |
| }; |
| |
| sdc2_default_state: sdc2-default { |
| clk { |
| pins = "sdc2_clk"; |
| bias-disable; |
| |
| /* |
| * It seems that mmc_test reports errors if drive |
| * strength is not 16 on clk, cmd, and data pins. |
| */ |
| drive-strength = <16>; |
| }; |
| |
| cmd { |
| pins = "sdc2_cmd"; |
| bias-pull-up; |
| drive-strength = <10>; |
| }; |
| |
| data { |
| pins = "sdc2_data"; |
| bias-pull-up; |
| drive-strength = <10>; |
| }; |
| }; |
| |
| sdc2_card_det_n: sd-card-det-n { |
| pins = "gpio126"; |
| function = "gpio"; |
| bias-pull-up; |
| }; |
| |
| wcd_intr_default: wcd_intr_default { |
| pins = <54>; |
| function = "gpio"; |
| |
| input-enable; |
| bias-pull-down; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| &uart3 { |
| label = "LS-UART0"; |
| status = "disabled"; |
| }; |
| |
| &uart6 { |
| status = "okay"; |
| |
| bluetooth { |
| compatible = "qcom,wcn3990-bt"; |
| |
| vddio-supply = <&vreg_s4a_1p8>; |
| vddxo-supply = <&vreg_l7a_1p8>; |
| vddrf-supply = <&vreg_l17a_1p3>; |
| vddch0-supply = <&vreg_l25a_3p3>; |
| max-speed = <3200000>; |
| }; |
| }; |
| |
| &uart9 { |
| label = "LS-UART1"; |
| status = "okay"; |
| }; |
| |
| &usb_1 { |
| status = "okay"; |
| }; |
| |
| &usb_1_dwc3 { |
| dr_mode = "peripheral"; |
| }; |
| |
| &usb_1_hsphy { |
| status = "okay"; |
| |
| vdd-supply = <&vreg_l1a_0p875>; |
| vdda-pll-supply = <&vreg_l12a_1p8>; |
| vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; |
| |
| qcom,imp-res-offset-value = <8>; |
| qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; |
| qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; |
| qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; |
| }; |
| |
| &usb_1_qmpphy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l26a_1p2>; |
| vdda-pll-supply = <&vreg_l1a_0p875>; |
| }; |
| |
| &usb_2 { |
| status = "okay"; |
| }; |
| |
| &usb_2_dwc3 { |
| dr_mode = "host"; |
| }; |
| |
| &usb_2_hsphy { |
| status = "okay"; |
| |
| vdd-supply = <&vreg_l1a_0p875>; |
| vdda-pll-supply = <&vreg_l12a_1p8>; |
| vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; |
| |
| qcom,imp-res-offset-value = <8>; |
| qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; |
| }; |
| |
| &usb_2_qmpphy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l26a_1p2>; |
| vdda-pll-supply = <&vreg_l1a_0p875>; |
| }; |
| |
| &ufs_mem_hc { |
| status = "okay"; |
| |
| reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; |
| |
| vcc-supply = <&vreg_l20a_2p95>; |
| vcc-max-microamp = <800000>; |
| }; |
| |
| &ufs_mem_phy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l1a_0p875>; |
| vdda-pll-supply = <&vreg_l26a_1p2>; |
| }; |
| |
| &wcd9340{ |
| pinctrl-0 = <&wcd_intr_default>; |
| pinctrl-names = "default"; |
| clock-names = "extclk"; |
| clocks = <&rpmhcc RPMH_LN_BB_CLK2>; |
| reset-gpios = <&tlmm 64 0>; |
| vdd-buck-supply = <&vreg_s4a_1p8>; |
| vdd-buck-sido-supply = <&vreg_s4a_1p8>; |
| vdd-tx-supply = <&vreg_s4a_1p8>; |
| vdd-rx-supply = <&vreg_s4a_1p8>; |
| vdd-io-supply = <&vreg_s4a_1p8>; |
| |
| swm: swm@c85 { |
| left_spkr: wsa8810-left{ |
| compatible = "sdw10217201000"; |
| reg = <0 1>; |
| powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; |
| #thermal-sensor-cells = <0>; |
| sound-name-prefix = "SpkrLeft"; |
| #sound-dai-cells = <0>; |
| }; |
| |
| right_spkr: wsa8810-right{ |
| compatible = "sdw10217201000"; |
| powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; |
| reg = <0 2>; |
| #thermal-sensor-cells = <0>; |
| sound-name-prefix = "SpkrRight"; |
| #sound-dai-cells = <0>; |
| }; |
| }; |
| }; |
| |
| &wifi { |
| status = "okay"; |
| |
| vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; |
| vdd-1.8-xo-supply = <&vreg_l7a_1p8>; |
| vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; |
| vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; |
| |
| qcom,snoc-host-cap-8bit-quirk; |
| }; |
| |
| /* PINCTRL - additions to nodes defined in sdm845.dtsi */ |
| &qup_spi2_default { |
| pinconf { |
| pins = "gpio27", "gpio28", "gpio29", "gpio30"; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| &qup_uart3_default{ |
| pinmux { |
| pins = "gpio41", "gpio42", "gpio43", "gpio44"; |
| function = "qup3"; |
| }; |
| }; |
| |
| &qup_i2c10_default { |
| pinconf { |
| pins = "gpio55", "gpio56"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| &qup_uart6_default { |
| pinmux { |
| pins = "gpio45", "gpio46", "gpio47", "gpio48"; |
| function = "qup6"; |
| }; |
| |
| cts { |
| pins = "gpio45"; |
| bias-disable; |
| }; |
| |
| rts-tx { |
| pins = "gpio46", "gpio47"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| |
| rx { |
| pins = "gpio48"; |
| bias-pull-up; |
| }; |
| }; |
| |
| &qup_uart9_default { |
| pinconf-tx { |
| pins = "gpio4"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| |
| pinconf-rx { |
| pins = "gpio5"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| &pm8998_gpio { |
| |
| }; |
| |
| &cci { |
| status = "okay"; |
| }; |
| |
| &camss { |
| vdda-supply = <&vreg_l1a_0p875>; |
| |
| status = "ok"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| port@0 { |
| reg = <0>; |
| csiphy0_ep: endpoint { |
| clock-lanes = <7>; |
| data-lanes = <0 1 2 3>; |
| remote-endpoint = <&ov8856_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| &cci_i2c0 { |
| camera@10 { |
| compatible = "ovti,ov8856"; |
| reg = <0x10>; |
| |
| // CAM0_RST_N |
| reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&cam0_default>; |
| gpios = <&tlmm 13 0>, |
| <&tlmm 9 GPIO_ACTIVE_LOW>; |
| |
| clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; |
| clock-names = "xvclk"; |
| clock-frequency = <19200000>; |
| |
| /* The &vreg_s4a_1p8 trace is powered on as a, |
| * so it is represented by a fixed regulator. |
| * |
| * The 2.8V vdda-supply and 1.2V vddd-supply regulators |
| * both have to be enabled through the power management |
| * gpios. |
| */ |
| power-domains = <&clock_camcc TITAN_TOP_GDSC>; |
| |
| dovdd-supply = <&vreg_lvs1a_1p8>; |
| avdd-supply = <&cam0_avdd_2v8>; |
| dvdd-supply = <&cam0_dvdd_1v2>; |
| |
| status = "ok"; |
| |
| port { |
| ov8856_ep: endpoint { |
| clock-lanes = <1>; |
| link-frequencies = /bits/ 64 |
| <360000000 180000000>; |
| data-lanes = <1 2 3 4>; |
| remote-endpoint = <&csiphy0_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| &cci_i2c1 { |
| camera@60 { |
| compatible = "ovti,ov7251"; |
| |
| // I2C address as per ov7251.txt linux documentation |
| reg = <0x60>; |
| |
| // CAM3_RST_N |
| enable-gpios = <&tlmm 21 0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&cam3_default>; |
| gpios = <&tlmm 16 0>, |
| <&tlmm 21 0>; |
| |
| clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; |
| clock-names = "xclk"; |
| clock-frequency = <24000000>; |
| |
| /* The &vreg_s4a_1p8 trace always powered on. |
| * |
| * The 2.8V vdda-supply regulator is enabled when the |
| * vreg_s4a_1p8 trace is pulled high. |
| * It too is represented by a fixed regulator. |
| * |
| * No 1.2V vddd-supply regulator is used. |
| */ |
| power-domains = <&clock_camcc TITAN_TOP_GDSC>; |
| |
| vdddo-supply = <&vreg_lvs1a_1p8>; |
| vdda-supply = <&cam3_avdd_2v8>; |
| |
| status = "disable"; |
| |
| port { |
| ov7251_ep: endpoint { |
| clock-lanes = <1>; |
| data-lanes = <0 1>; |
| // remote-endpoint = <&csiphy3_ep>; |
| }; |
| }; |
| }; |
| }; |
