| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */ |
| |
| #ifndef __ABI_MACH_T234_POWERGATE_T234_H_ |
| #define __ABI_MACH_T234_POWERGATE_T234_H_ |
| |
| #define TEGRA234_POWER_DOMAIN_AUD 2U |
| #define TEGRA234_POWER_DOMAIN_DISP 3U |
| #define TEGRA234_POWER_DOMAIN_PCIEX8A 5U |
| #define TEGRA234_POWER_DOMAIN_PCIEX4A 6U |
| #define TEGRA234_POWER_DOMAIN_PCIEX4BA 7U |
| #define TEGRA234_POWER_DOMAIN_PCIEX4BB 8U |
| #define TEGRA234_POWER_DOMAIN_PCIEX1A 9U |
| #define TEGRA234_POWER_DOMAIN_PCIEX4CA 13U |
| #define TEGRA234_POWER_DOMAIN_PCIEX4CB 14U |
| #define TEGRA234_POWER_DOMAIN_PCIEX4CC 15U |
| #define TEGRA234_POWER_DOMAIN_PCIEX8B 16U |
| #define TEGRA234_POWER_DOMAIN_MGBEA 17U |
| #define TEGRA234_POWER_DOMAIN_MGBEB 18U |
| #define TEGRA234_POWER_DOMAIN_MGBEC 19U |
| #define TEGRA234_POWER_DOMAIN_MGBED 20U |
| #define TEGRA234_POWER_DOMAIN_VIC 29U |
| |
| #endif |
