| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6 |
| // RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \ |
| // RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \ |
| // RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z18ReturnZerosSwizzleu11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0:[0-9]+]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnZerosSwizzle(half4x4 A) { |
| return A._m00_m01_m02_m03; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z19ReturnZerosSwizzle2u11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnZerosSwizzle2(half4x4 A) { |
| return A._m00_m10_m20_m30; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z17ReturnOnesSwizzleu11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnOnesSwizzle(half4x4 A) { |
| return A._m10_m11_m12_m13; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z18ReturnOnesSwizzle2u11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnOnesSwizzle2(half4x4 A) { |
| return A._m01_m11_m21_m31; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z17ReturnTwosSwizzleu11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 8, i32 9, i32 10, i32 11> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnTwosSwizzle(half4x4 A) { |
| return A._m20_m21_m22_m23; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z18ReturnTwosSwizzle2u11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnTwosSwizzle2(half4x4 A) { |
| return A._m02_m12_m22_m32; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z19ReturnThreesSwizzleu11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 12, i32 13, i32 14, i32 15> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnThreesSwizzle(half4x4 A) { |
| return A._m30_m31_m32_m33; |
| } |
| |
| // CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x half> @_Z20ReturnThreesSwizzle2u11matrix_typeILm4ELm4EDhE( |
| // CHECK-SAME: <16 x half> noundef nofpclass(nan inf) [[A:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca [4 x <4 x half>], align 2 |
| // CHECK-NEXT: store <16 x half> [[A]], ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x half>, ptr [[A_ADDR]], align 2 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x half> [[TMP0]], <16 x half> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15> |
| // CHECK-NEXT: ret <4 x half> [[TMP1]] |
| // |
| half4 ReturnThreesSwizzle2(half4x4 A) { |
| return A._m03_m13_m23_m33; |
| } |