| /dts-v1/; |
| |
| /memreserve/ 0x1c000000 0x04000000; |
| /include/ "tegra250.dtsi" |
| /include/ "chromeos.dtsi" |
| /include/ "flashmap-twostop-2mb.dtsi" |
| |
| / { |
| model = "NVIDIA Seaboard"; |
| compatible = "nvidia,seaboard", "nvidia,tegra250"; |
| |
| config { |
| odmdata = <0x300d8011>; |
| hwid = "ARM SEABOARD TEST 1176"; |
| machine-arch-id = <3005>; |
| |
| /* Chrome OS specific GPIO */ |
| /* |
| * Parameter 3 bits |
| * bit 0: 1=output, 0=input |
| * bit 1: 1=high, 0=low |
| * bit 2: 1=active low, 0=active high |
| */ |
| write-protect-switch = <&gpio 59 0>; |
| recovery-switch = <&gpio 56 4>; |
| developer-switch = <&gpio 168 0>; |
| /* Seaboard's lid-switch is ignored */ |
| power-switch = <&gpio 170 4>; |
| }; |
| |
| aliases { |
| console = "/serial@70006300"; |
| usb0 = "/usb@0xc5008000"; |
| usb1 = "/usb@0xc5000000"; |
| |
| sdmmc0 = "/sdhci@c8000600"; |
| sdmmc1 = "/sdhci@c8000400"; |
| |
| i2c0 = "/i2c@0x7000d000"; |
| i2c1 = "/i2c@0x7000c000"; |
| i2c2 = "/i2c@0x7000c400"; |
| i2c3 = "/i2c@0x7000c500"; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0x00000000 0x40000000>; |
| }; |
| |
| serial@70006300 { |
| status = "ok"; |
| clock-frequency = <216000000>; |
| }; |
| |
| /* |
| * Seaboard has a switch on GPIO67 which affects this UART. Until |
| * pinmux support is added to the FDT it is not clear how to do this, |
| * so this is a stop-gap. |
| */ |
| switch { |
| compatible = "nvidia,spi-uart-switch"; |
| uart = <&uart3>; |
| |
| /* Parameter 3 bit 0:1=output, 0=input; bit 1:1=high, 0=low */ |
| gpios = <&gpio 67 1>; /* Port I = 8 bit = 3: 8 * 8 + 3 */ |
| }; |
| |
| sdhci@c8000400 { |
| status = "ok"; |
| width = <4>; /* width of SDIO port */ |
| removable = <1>; |
| /* Parameter 3 bit 0:1=output, 0=input; bit 1:1=high, 0=low */ |
| cd-gpio = <&gpio 69 0>; /* card detect, gpio PI5 */ |
| wp-gpio = <&gpio 57 0>; /* write protect, gpio PH1 */ |
| power-gpio = <&gpio 70 3>; /* power enable, gpio PI6 */ |
| }; |
| |
| emmc: sdhci@c8000600 { |
| status = "ok"; |
| width = <4>; /* width of SDIO port */ |
| removable = <0>; |
| }; |
| |
| lcd { |
| compatible = "nvidia,tegra2-lcd"; |
| width = <1366>; |
| height = <768>; |
| bits_per_pixel = <16>; |
| pwfm = <&pwfm2>; |
| display = <&display1>; |
| /* frame-buffer location = top of memory - carveout - fb */ |
| frame-buffer = <0x2f680000>; |
| |
| pixel_clock = <70600000>; |
| |
| /* Timing: ref_to_sync, sync_width. back_porch, front_porch */ |
| horiz_timing = <11 58 58 58>; |
| vert_timing = <1 4 4 4>; |
| |
| /* Parameter 3 bit 0:1=output, 0=input; bit 1:1=high, 0=low */ |
| backlight-enable = <&gpio 28 1>; /* PD4 */ |
| lvds-shutdown = <&gpio 10 1>; /* PB2 */ |
| backlight-vdd = <&gpio 176 1>; /* PW0 */ |
| panel-vdd = <&gpio 22 1>; /* PC6 */ |
| |
| /* |
| * Panel required timings |
| * Timing 1: delay between panel_vdd-rise and data-rise |
| * Timing 2: delay between data-rise and backlight_vdd-rise |
| * Timing 3: delay between backlight_vdd and pwm-rise |
| * Timing 4: delay between pwm-rise and backlight_en-rise |
| */ |
| panel-timings = <4 203 17 15>; |
| }; |
| |
| usb@0xc5000000 { |
| status = "ok"; |
| host-mode = <1>; |
| }; |
| |
| usbphy: usbphy@0 { |
| compatible = "smsc,usb3315"; |
| status = "ok"; |
| }; |
| |
| usb@0xc5008000 { |
| status = "ok"; |
| utmi = <&usbphy>; |
| host-mode = <0>; |
| }; |
| |
| kbc@0x7000e200 { |
| keycode-plain = [00 00 'w' 's' 'a' 'z' 00 DE |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| '5' '4' 'r' 'e' 'f' 'd' 'x' 00 |
| '7' '6' 't' 'h' 'g' 'v' 'c' ' ' |
| '9' '8' 'u' 'y' 'j' 'n' 'b' 5C |
| '-' '0' 'o' 'i' 'l' 'k' ',' 'm' |
| 00 '=' ']' 0D 00 00 00 00 |
| 00 00 00 00 DF DF 00 00 |
| 00 00 00 00 00 DC 00 DD |
| 00 00 00 00 00 00 00 00 |
| '[' 'p' 27 ';' '/' '.' 00 00 |
| 00 00 08 '3' '2' 1E 00 00 |
| 00 7F 00 00 00 1D 1F 1C |
| 00 00 00 'q' 00 00 '1' 00 |
| 1B '`' 00 09 00 00 00 00]; |
| |
| keycode-shift = [00 00 'W' 'S' 'A' 'Z' 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| '%' '$' 'R' 'E' 'F' 'D' 'X' 00 |
| '&' '^' 'T' 'H' 'G' 'V' 'C' ' ' |
| '(' '*' 'U' 'Y' 'J' 'N' 'B' '|' |
| '_' ')' 'O' 'I' 'L' 'K' '<' 'M' |
| 00 '+' '}' 0D 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| '{' 'P' '"' ':' '?' '>' 00 00 |
| 00 00 08 '#' '@' 00 00 00 |
| 00 7F 00 00 00 00 00 00 |
| 00 00 00 'Q' 00 00 '!' 00 |
| 1B '~' 00 09 00 00 00 00]; |
| |
| keycode-fn = [00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| '7' 00 00 00 00 00 00 00 |
| '9' '8' '4' 00 '1' 00 00 00 |
| 00 '/' '6' '5' '3' '2' 00 '0' |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 27 00 '-' '+' '.' 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 '?' 00 00 00]; |
| |
| keycode-ctrl = [00 00 17 13 01 1a 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 12 05 06 04 18 00 |
| 00 00 14 08 07 16 03 00 |
| 00 00 15 19 0a 0e 02 00 |
| 00 00 0f 09 0c 0b 00 0d |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 10 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 |
| 00 00 00 11 00 00 00 00 |
| 00 00 00 00 00 00 00 00]; |
| }; |
| |
| flash@0x70008000 { |
| compatible = "hynix,HY27UF4G2B", "nand-flash"; |
| controller = <&nand>; |
| |
| /* How many bytes for data area */ |
| page-data-bytes = <2048>; |
| |
| /* How many ECC bytes to be generated for tag bytes */ |
| tag-ecc-bytes = <4>; |
| |
| /* How many tag bytes in spare area */ |
| tag-bytes = <20>; |
| |
| /* How many ECC bytes for data area */ |
| data-ecc-bytes = <36>; |
| |
| skipped-spare-bytes = <4>; |
| |
| /* |
| * How many bytes in spare area |
| * spare area = skipped bytes + ECC bytes of data area |
| * + tag bytes + ECC bytes of tag bytes |
| */ |
| page-spare-bytes = <64>; |
| |
| /* |
| * MAX_TRP_TREA: |
| * non-EDO mode: value (in ns) = Max(tRP, tREA) + 6ns |
| * EDO mode: value (in ns) = tRP timing |
| * |
| * Timing values: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH), |
| * TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL |
| */ |
| timing = <26 100 20 80 20 10 12 10 70>; |
| }; |
| |
| nand-controller@0x70008000 { |
| status = "ok"; |
| wp-gpio = <&gpio 59 3>; /* PH3 */ |
| width = <8>; |
| }; |
| }; |
