arch/x86/dts/coreboot.dts

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
 *
 * Generic coreboot payload device tree for x86 targets
 */

/dts-v1/;

/include/ "skeleton.dtsi"
/include/ "keyboard.dtsi"
/include/ "pcspkr.dtsi"
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"

#include <pci_ids.h>
#include <dt-bindings/pci/pci.h>

#if defined(CONFIG_CHROMEOS_VBOOT)
#include "chromeos-coreboot.dtsi"
#endif

/ {
	model = "coreboot x86 payload";
	compatible = "coreboot,x86-payload";

	aliases {
		serial0 = &serial;
	};

	config {
		silent_console = <0>;
	};

	chosen {
		stdout-path = "/serial";
	};

	tsc-timer {
		clock-frequency = <1000000000>;
	};

	pci {
		compatible = "pci-x86";
		u-boot,dm-pre-reloc;
		u-boot,pci-pre-reloc = <
			PCI_VENDEV(PCI_VENDOR_ID_INTEL,
				   PCI_DEVICE_ID_INTEL_APL_UART2)>;
	};

	serial: serial {
		u-boot,dm-pre-reloc;
		compatible = "coreboot-serial";
	};

	coreboot-fb {
		compatible = "coreboot-fb";
	};
};