Add support for ram payloads
This is enabled by CONFIG_RAMPAYLOAD.
The code will look for a ram payload and, if it is found, try
to run it. If the load fails or the payload returns it will
continue with ramstage.
We also include a new payload, linuxcheck, which is intended
to verify that linux can be loaded and run, e.g. as a LinuxBoot
payload. Currently, it fails.
This does not yet work but it makes sense as a foundation on which
to build. For one thing, we need to build at least a few tables
for Linux. The goal for LinuxBoot is to build as few as possible.
To test with linuxcheck (linux is not even close to working):
cd payloads/linuxcheck/
cp x86config .config
make
cd ../..
make
./build/cbfstool build/coreboot.rom add-payload -n fallback/rampayload -f payloads/linuxcheck/linuxcheck.elf
qemu-system-x86_64 -nographic -m 8192 -bios build/coreboot.rom -monitor /dev/pts/$1 -s
We need to change the payload menu so we can add a rampayload but it's a bit
tricky as written, so that must come later.
Note that I'm still creating a special purpose romselfboot. The idea of
merging romselfboot and selfboot is probably a good idea -- in the future.
I think until we know how this should look, such a merge is premature.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Change-Id: I8199aae6776f6dee969b370b0e6a41ef96e854d8
clang-formatted-by: Ronald G. Minnich
Reviewed-on: https://review.coreboot.org/28402
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
index 0d142d6..3f9f7e6 100644
--- a/payloads/Makefile.inc
+++ b/payloads/Makefile.inc
@@ -27,6 +27,7 @@
payloads/coreinfo \
payloads/nvramcui \
payloads/libpayload \
+payloads/linuxcheck \
payloads/external/depthcharge \
payloads/external/SeaBIOS \
payloads/external/U-Boot \
diff --git a/payloads/linuxcheck/Makefile b/payloads/linuxcheck/Makefile
new file mode 100644
index 0000000..0e3feae
--- /dev/null
+++ b/payloads/linuxcheck/Makefile
@@ -0,0 +1,34 @@
+LIBPAYLOAD_DIR=$(CURDIR)/libpayload
+XCOMPILE=$(LIBPAYLOAD_DIR)/libpayload.xcompile
+# build libpayload and put .config file in $(CURDIR) instead of ../libpayload
+# to avoid pollute the libpayload source directory and possible conflicts
+LPOPTS=obj="$(CURDIR)/build" DESTDIR="$(CURDIR)" DOTCONFIG="$(CURDIR)/.config"
+CFLAGS += -Wall -Werror -Os -ffreestanding -nostdinc -nostdlib
+
+all: linuxcheck.elf
+
+$(LIBPAYLOAD_DIR):
+ $(MAKE) -C ../libpayload $(LPOPTS) defconfig
+ $(MAKE) -C ../libpayload $(LPOPTS)
+ $(MAKE) -C ../libpayload $(LPOPTS) install
+
+ifneq ($(strip $(wildcard libpayload)),)
+include $(XCOMPILE)
+LPGCC = CC="$(GCC_CC_x86_32)" "$(LIBPAYLOAD_DIR)/bin/lpgcc"
+%.elf: %.c Makefile
+ $(LPGCC) $(CFLAGS) -o $*.elf $*.c
+else
+# If libpayload is not found, first build libpayload,
+# then do the make, this time it'll find libpayload
+# and generate the linuxcheck.elf target
+%.elf: $(LIBPAYLOAD_DIR)
+ $(MAKE) all
+endif
+
+clean:
+ rm -f linuxcheck.elf
+
+distclean: clean
+ rm -rf build libpayload .config .config.old
+
+.PHONY: all clean distclean
diff --git a/payloads/linuxcheck/linuxcheck.c b/payloads/linuxcheck/linuxcheck.c
new file mode 100644
index 0000000..516df45
--- /dev/null
+++ b/payloads/linuxcheck/linuxcheck.c
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreinfo project.
+ *
+ * Copyright (C) 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <libpayload-config.h>
+#include <libpayload.h>
+
+extern struct console_output_driver *console_out;
+extern struct sysinfo_t lib_sysinfo;
+static void buts(char *s)
+{
+ int i;
+ for (i = 0; i < strlen(s); i++)
+ outb(s[i], 0x3f8);
+}
+int main(void)
+{
+ buts("Greetings from linuxcheck, via hard-coded calls to serial functions.\n");
+ if (console_out == NULL)
+ buts("Bad news: console_out is NULL\n");
+ if (lib_sysinfo.serial == NULL)
+ buts("Bad news: lib_sysinfo.serial is NULL. Very little will work well.\n");
+ buts("The next line should be puts works\n");
+ puts("puts works\n");
+ buts("If you did not see puts works, then you have a console issues\n");
+ buts("The next line should be 'printf works'\n");
+ printf("printf works\n");
+ buts(" ... if you did not see printf works, then you have a printf issue\n");
+ buts("Now we will halt. Bye");
+ halt();
+ return 0;
+}
diff --git a/payloads/linuxcheck/x86config b/payloads/linuxcheck/x86config
new file mode 100644
index 0000000..d5a8cf1
--- /dev/null
+++ b/payloads/linuxcheck/x86config
@@ -0,0 +1,115 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Libpayload Configuration
+#
+
+#
+# Generic Options
+#
+# CONFIG_LP_GPL is not set
+# CONFIG_LP_EXPERIMENTAL is not set
+# CONFIG_LP_DEVELOPER is not set
+# CONFIG_LP_CHROMEOS is not set
+CONFIG_LP_COMPILER_GCC=y
+# CONFIG_LP_COMPILER_LLVM_CLANG is not set
+# CONFIG_LP_MEMMAP_RAM_ONLY is not set
+
+#
+# Architecture Options
+#
+# CONFIG_LP_ARCH_ARM is not set
+CONFIG_LP_ARCH_X86=y
+# CONFIG_LP_ARCH_ARM64 is not set
+# CONFIG_LP_ARCH_MIPS is not set
+# CONFIG_LP_MULTIBOOT is not set
+CONFIG_LP_HEAP_SIZE=262144
+CONFIG_LP_STACK_SIZE=16384
+CONFIG_LP_BASE_ADDRESS=0x00100000
+# CONFIG_LP_USE_MARCH_586 is not set
+
+#
+# Standard Libraries
+#
+CONFIG_LP_LIBC=y
+CONFIG_LP_CURSES=y
+# CONFIG_LP_TINYCURSES is not set
+CONFIG_LP_PDCURSES=y
+CONFIG_LP_CBFS=y
+CONFIG_LP_LZMA=y
+CONFIG_LP_LZ4=y
+
+#
+# Console Options
+#
+# CONFIG_LP_SKIP_CONSOLE_INIT is not set
+CONFIG_LP_CBMEM_CONSOLE=y
+CONFIG_LP_SERIAL_CONSOLE=y
+CONFIG_LP_8250_SERIAL_CONSOLE=y
+# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
+# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
+# CONFIG_LP_IPQ40XX_SERIAL_CONSOLE is not set
+# CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set
+# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
+CONFIG_LP_SERIAL_IOBASE=0x3f8
+# CONFIG_LP_SERIAL_SET_SPEED is not set
+# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
+CONFIG_LP_VIDEO_CONSOLE=y
+CONFIG_LP_VGA_VIDEO_CONSOLE=y
+# CONFIG_LP_GEODELX_VIDEO_CONSOLE is not set
+CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
+CONFIG_LP_FONT_SCALE_FACTOR=0
+CONFIG_LP_PC_I8042=y
+CONFIG_LP_PC_MOUSE=y
+CONFIG_LP_PC_KEYBOARD=y
+CONFIG_LP_PC_KEYBOARD_LAYOUT_US=y
+# CONFIG_LP_PC_KEYBOARD_LAYOUT_DE is not set
+
+#
+# Drivers
+#
+CONFIG_LP_PCI=y
+CONFIG_LP_NVRAM=y
+CONFIG_LP_MOUSE_CURSOR=y
+# CONFIG_LP_RTC_PORT_EXTENDED_VIA is not set
+CONFIG_LP_SPEAKER=y
+CONFIG_LP_TIMER_RDTSC=y
+# CONFIG_LP_TIMER_NONE is not set
+# CONFIG_LP_TIMER_MCT is not set
+# CONFIG_LP_TIMER_TEGRA_1US is not set
+# CONFIG_LP_TIMER_IPQ806X is not set
+# CONFIG_LP_TIMER_ARMADA38X is not set
+# CONFIG_LP_TIMER_IPQ40XX is not set
+# CONFIG_LP_TIMER_ARM64_ARCH is not set
+# CONFIG_LP_TIMER_RK3288 is not set
+# CONFIG_LP_TIMER_RK3399 is not set
+# CONFIG_LP_TIMER_CYGNUS is not set
+# CONFIG_LP_TIMER_IMG_PISTACHIO is not set
+# CONFIG_LP_TIMER_MTK is not set
+# CONFIG_LP_TIMER_MVMAP2315 is not set
+CONFIG_LP_TIMER_GENERIC_HZ=0
+CONFIG_LP_TIMER_GENERIC_REG=0x0
+CONFIG_LP_TIMER_GENERIC_HIGH_REG=0x0
+CONFIG_LP_STORAGE=y
+# CONFIG_LP_STORAGE_64BIT_LBA is not set
+CONFIG_LP_STORAGE_ATA=y
+CONFIG_LP_STORAGE_ATAPI=y
+CONFIG_LP_STORAGE_AHCI=y
+CONFIG_LP_STORAGE_AHCI_ONLY_TESTED=y
+CONFIG_LP_USB=y
+CONFIG_LP_USB_UHCI=y
+CONFIG_LP_USB_OHCI=y
+CONFIG_LP_USB_EHCI=y
+CONFIG_LP_USB_XHCI=y
+# CONFIG_LP_USB_XHCI_MTK_QUIRK is not set
+# CONFIG_LP_USB_DWC2 is not set
+CONFIG_LP_USB_HID=y
+CONFIG_LP_USB_HUB=y
+# CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT is not set
+CONFIG_LP_USB_MSC=y
+CONFIG_LP_USB_GEN_HUB=y
+CONFIG_LP_USB_PCI=y
+# CONFIG_LP_UDC is not set
+# CONFIG_LP_BIG_ENDIAN is not set
+CONFIG_LP_LITTLE_ENDIAN=y
+CONFIG_LP_IO_ADDRESS_SPACE=y
+CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y
diff --git a/src/Kconfig b/src/Kconfig
index bce3e32..35f2200 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -39,6 +39,13 @@
Select the prefix to all files put into the image. It's "fallback"
by default, "normal" is a common alternative.
+config RAMPAYLOAD
+ prompt "Enable RAM payload from romstage"
+ bool
+ default n
+ help
+ Enable romstage payload loader.
+
choice
prompt "Compiler to use"
default COMPILER_GCC
diff --git a/src/arch/x86/cbfs_and_run.c b/src/arch/x86/cbfs_and_run.c
index f25052b..cd36dbb 100644
--- a/src/arch/x86/cbfs_and_run.c
+++ b/src/arch/x86/cbfs_and_run.c
@@ -18,5 +18,7 @@
asmlinkage void copy_and_run(void)
{
+ if (IS_ENABLED(CONFIG_RAMPAYLOAD))
+ run_ramprog();
run_ramstage();
}
diff --git a/src/include/program_loading.h b/src/include/program_loading.h
index 482c8b8..62a7030 100644
--- a/src/include/program_loading.h
+++ b/src/include/program_loading.h
@@ -68,10 +68,10 @@
void *arg;
};
-#define PROG_INIT(type_, name_) \
- { \
- .type = (type_), \
- .name = (name_), \
+#define PROG_INIT(type_, name_) \
+ { \
+ .type = (type_), \
+ .name = (name_), \
}
static inline const char *prog_name(const struct prog *prog)
@@ -120,7 +120,7 @@
extern const struct mem_region_device addrspace_32bit;
static inline void prog_memory_init(struct prog *prog, uintptr_t ptr,
- size_t size)
+ size_t size)
{
rdev_chain(&prog->rdev, &addrspace_32bit.rdev, ptr, size);
}
@@ -174,8 +174,12 @@
/* Run ramstage from romstage. */
void run_ramstage(void);
+/* Run a prog (stage or payload) from romstage. */
+void run_ramprog(void);
+
/* Determine where stack for ramstage loader is located. */
-enum { ROMSTAGE_STACK_CBMEM, ROMSTAGE_STACK_LOW_MEM };
+enum { ROMSTAGE_STACK_CBMEM,
+ ROMSTAGE_STACK_LOW_MEM };
uintptr_t romstage_ram_stack_base(size_t size, int src);
uintptr_t romstage_ram_stack_top(void);
uintptr_t romstage_ram_stack_bottom(void);
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 4ae80d3..c2046ce 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -111,6 +111,7 @@
endif
romstage-$(CONFIG_GENERIC_UDELAY) += timer.c
+romstage-$(CONFIG_RAMPAYLOAD) += romselfboot.c
ramstage-y += prog_loaders.c
ramstage-y += prog_ops.c
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 1c192d1..901356f 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -77,9 +77,13 @@
}
void __weak stage_cache_add(int stage_id,
- const struct prog *stage) {}
+ const struct prog *stage)
+{
+}
void __weak stage_cache_load_stage(int stage_id,
- struct prog *stage) {}
+ struct prog *stage)
+{
+}
static void ramstage_cache_invalid(void)
{
@@ -138,9 +142,7 @@
* Only x86 systems using ramstage stage cache currently take the same
* firmware path on resume.
*/
- if (IS_ENABLED(CONFIG_ARCH_X86) &&
- !IS_ENABLED(CONFIG_NO_STAGE_CACHE) &&
- IS_ENABLED(CONFIG_EARLY_CBMEM_INIT))
+ if (IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_NO_STAGE_CACHE) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT))
run_ramstage_from_resume(&ramstage);
if (prog_locate(&ramstage))
@@ -165,6 +167,30 @@
die("Ramstage was not loaded!\n");
}
+/* run_ramprog tries to run CONFIG_CBFS_PREFIX "/rampayload"
+ * and returns on failure (or if, unlikely, the payload returns).
+ * It does not die, which allows us to run the ramstage. */
+void run_ramprog(void)
+{
+ struct prog rampayload = PROG_INIT(PROG_PAYLOAD,
+ CONFIG_CBFS_PREFIX "/rampayload");
+ timestamp_add_now(TS_END_ROMSTAGE);
+ if (prog_locate(&rampayload)) {
+ printk(BIOS_ERR,
+ "Can't find %s\n", CONFIG_CBFS_PREFIX "/rampayload");
+ return;
+ }
+
+ if (!selfload(&rampayload, 0)) {
+ printk(BIOS_ERR,
+ "Can't load %s\n", CONFIG_CBFS_PREFIX "/rampayload");
+ return;
+ }
+ prog_run(&rampayload);
+ printk(BIOS_ERR, "rampayload %s returns\n",
+ CONFIG_CBFS_PREFIX "/rampayload");
+}
+
#ifdef __RAMSTAGE__ // gc-sections should take care of this
static struct prog global_payload =
@@ -212,7 +238,7 @@
boot_successful();
printk(BIOS_DEBUG, "Jumping to boot code at %p(%p)\n",
- prog_entry(payload), prog_entry_arg(payload));
+ prog_entry(payload), prog_entry_arg(payload));
post_code(POST_ENTER_ELF_BOOT);
diff --git a/src/lib/romselfboot.c b/src/lib/romselfboot.c
new file mode 100644
index 0000000..416e797
--- /dev/null
+++ b/src/lib/romselfboot.c
@@ -0,0 +1,219 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Eric W. Biederman <ebiederm@xmission.com>
+ * Copyright (C) 2009 Ron Minnich <rminnich@gmail.com>
+ * Copyright (C) 2016 George Trudeau <george.trudeau@usherbrooke.ca>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <commonlib/compression.h>
+#include <commonlib/endian.h>
+#include <console/console.h>
+#include <cpu/cpu.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <symbols.h>
+#include <cbfs.h>
+#include <lib.h>
+#include <bootmem.h>
+#include <program_loading.h>
+#include <timestamp.h>
+
+struct segment {
+ struct segment *next;
+ struct segment *prev;
+ unsigned long s_dstaddr;
+ unsigned long s_srcaddr;
+ unsigned long s_memsz;
+ unsigned long s_filesz;
+ int compression;
+};
+
+/* Decode a serialized cbfs payload segment
+ * from memory into native endianness.
+ */
+static void cbfs_decode_payload_segment(struct cbfs_payload_segment *segment,
+ const struct cbfs_payload_segment *src)
+{
+ segment->type = read_be32(&src->type);
+ segment->compression = read_be32(&src->compression);
+ segment->offset = read_be32(&src->offset);
+ segment->load_addr = read_be64(&src->load_addr);
+ segment->len = read_be32(&src->len);
+ segment->mem_len = read_be32(&src->mem_len);
+}
+
+static int
+load_segment(struct segment *ptr)
+{
+ unsigned char *dest, *src, *end;
+ size_t len, memsz;
+
+ printk(BIOS_DEBUG,
+ "Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
+ ptr->s_dstaddr, ptr->s_memsz, ptr->s_filesz);
+ /* Compute the boundaries of the segment */
+ dest = (unsigned char *)(ptr->s_dstaddr);
+ src = (unsigned char *)(ptr->s_srcaddr);
+ len = ptr->s_filesz;
+ memsz = ptr->s_memsz;
+ end = dest + memsz;
+
+ switch (ptr->compression) {
+ case CBFS_COMPRESS_LZMA: {
+ printk(BIOS_DEBUG, "using LZMA\n");
+ timestamp_add_now(TS_START_ULZMA);
+ len = ulzman(src, len, dest, memsz);
+ timestamp_add_now(TS_END_ULZMA);
+ if (!len) /* Decompression Error. */
+ return 0;
+ break;
+ }
+ case CBFS_COMPRESS_LZ4: {
+ printk(BIOS_DEBUG, "using LZ4\n");
+ timestamp_add_now(TS_START_ULZ4F);
+ len = ulz4fn(src, len, dest, memsz);
+ timestamp_add_now(TS_END_ULZ4F);
+ if (!len) /* Decompression Error. */
+ return 0;
+ break;
+ }
+ case CBFS_COMPRESS_NONE: {
+ printk(BIOS_DEBUG, "it's not compressed!\n");
+ memcpy(dest, src, len);
+ break;
+ }
+ default:
+ printk(BIOS_INFO, "CBFS: Unknown compression type %d\n",
+ ptr->compression);
+ return -1;
+ }
+ return 0;
+}
+
+/* This loads the payload from a romstage.
+ * This is different than the ramstage payload loader since we don't
+ * check memory regions and we don't use malloc anywhere. It is most like
+ * the LinuxBIOS v3 SELF loader.
+ */
+static int load_payload(
+ struct segment *head,
+ struct cbfs_payload *cbfs_payload, uintptr_t *entry)
+{
+ struct segment *new;
+ struct cbfs_payload_segment *current_segment, *first_segment, segment;
+ struct segment ptr;
+
+ memset(head, 0, sizeof(*head));
+ head->next = head->prev = head;
+
+ first_segment = &cbfs_payload->segments;
+
+ for (current_segment = first_segment;; ++current_segment) {
+ printk(BIOS_DEBUG,
+ "Decoding segment from ROM address 0x%p\n",
+ current_segment);
+
+ cbfs_decode_payload_segment(&segment, current_segment);
+
+ switch (segment.type) {
+ case PAYLOAD_SEGMENT_PARAMS:
+ printk(BIOS_DEBUG, " parameter section (skipped)\n");
+ continue;
+
+ case PAYLOAD_SEGMENT_CODE:
+ case PAYLOAD_SEGMENT_DATA:
+ printk(BIOS_DEBUG, " %s (compression=%x)\n",
+ segment.type == PAYLOAD_SEGMENT_CODE
+ ? "code"
+ : "data",
+ segment.compression);
+
+ new = &ptr;
+ new->s_dstaddr = segment.load_addr;
+ new->s_memsz = segment.mem_len;
+ new->compression = segment.compression;
+ new->s_srcaddr = (uintptr_t)((unsigned char *)first_segment)
+ + segment.offset;
+ new->s_filesz = segment.len;
+
+ printk(BIOS_DEBUG,
+ " New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n",
+ new->s_dstaddr, new->s_memsz, new->s_srcaddr,
+ new->s_filesz);
+
+ /* Clean up the values */
+ if (new->s_filesz > new->s_memsz) {
+ new->s_filesz = new->s_memsz;
+ printk(BIOS_DEBUG,
+ " cleaned up filesize 0x%lx\n",
+ new->s_filesz);
+ }
+ load_segment(new);
+ break;
+
+ case PAYLOAD_SEGMENT_BSS:
+ printk(BIOS_DEBUG, " BSS 0x%p (%d byte)\n", (void *)(intptr_t)segment.load_addr, segment.mem_len);
+
+ new = &ptr;
+ new->s_filesz = 0;
+ new->s_srcaddr = (uintptr_t)((unsigned char *)first_segment)
+ + segment.offset;
+ new->s_dstaddr = segment.load_addr;
+ new->s_memsz = segment.mem_len;
+ new->compression = CBFS_COMPRESS_NONE;
+ load_segment(new);
+ break;
+
+ case PAYLOAD_SEGMENT_ENTRY:
+ printk(BIOS_DEBUG, " Entry Point 0x%p\n", (void *)(intptr_t)segment.load_addr);
+
+ *entry = segment.load_addr;
+ /* Per definition, a payload always has the entry point
+ * as last segment. Thus, we use the occurrence of the
+ * entry point as break condition for the loop.
+ * Can we actually just look at the number of section?
+ */
+ return 1;
+
+ default:
+ /* We found something that we don't know about. Throw
+ * hands into the sky and run away!
+ */
+ printk(BIOS_EMERG, "Bad segment type %x\n",
+ segment.type);
+ return -1;
+ }
+ }
+
+ return 1;
+}
+
+bool selfload(struct prog *payload, bool check_regions)
+{
+ uintptr_t entry = 0;
+ struct segment head;
+ void *data;
+
+ data = rdev_mmap_full(prog_rdev(payload));
+ if (data == NULL)
+ return false;
+
+ /* Load the segments */
+ if (!load_payload(&head, data, &entry))
+ return false;
+
+ prog_set_entry(payload, (void *)entry, NULL);
+ printk(BIOS_SPEW, "Loaded segments\n");
+ return true;
+}
