UPSTREAM: build system: Always add coreboot.pre dependency to intermediates
They all operate on that file, so just add it globally.
BUG=none
BRANCH=none
TEST=none
Change-Id: I02ba71178b8893e46c8c31cddebd6683d0a0b2ae
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 2cc5bcbf7f80d48950da90dd142a931a55392cc0
Original-Change-Id: I953975a4078d0f4a5ec0b6248f0dcedada69afb2
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/49380
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2635583
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2672517
Reviewed-by: Evan Green <evgreen@chromium.org>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
diff --git a/Makefile.inc b/Makefile.inc
index a67b22c..f0cbb34 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -1145,7 +1145,7 @@
endif
add_intermediate = \
- $(1): $(2) | $(INTERMEDIATE) \
+ $(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \
$(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1))
$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE)
@@ -1251,7 +1251,7 @@
ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \
sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p'
-$(call add_intermediate, check-ramstage-overlaps, $(obj)/coreboot.pre)
+$(call add_intermediate, check-ramstage-overlaps)
programs=$$($(foreach file,$(check-ramstage-overlap-files), \
$(call cbfs-get-segments-cmd,$(file)) ; )) ; \
regions=$$($(foreach region,$(check-ramstage-overlap-regions), \
diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc
index 9c1a569..9b4e708 100644
--- a/payloads/external/Makefile.inc
+++ b/payloads/external/Makefile.inc
@@ -101,7 +101,7 @@
ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
-$(call add_intermediate, seabios_ps2_timeout, $(obj)/coreboot.pre $(CBFSTOOL))
+$(call add_intermediate, seabios_ps2_timeout, $(CBFSTOOL))
@printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/ps2-keyboard-spinup 2>/dev/null)
$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
@@ -109,14 +109,14 @@
endif
ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y)
-$(call add_intermediate, seabios_sercon, $(obj)/coreboot.pre $(CBFSTOOL))
+$(call add_intermediate, seabios_sercon, $(CBFSTOOL))
@printf " SeaBIOS Add sercon-port file\n"
$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/sercon-port 2>/dev/null)
$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port
endif
ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y)
-$(call add_intermediate, seabios_thread_optionroms, $(obj)/coreboot.pre $(CBFSTOOL))
+$(call add_intermediate, seabios_thread_optionroms, $(CBFSTOOL))
@printf " SeaBIOS Thread optionroms\n"
$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/threads 2>/dev/null)
$(CBFSTOOL) $< add-int -i 2 -n etc/threads
diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc
index 8d8f07d..3b18e0b 100644
--- a/src/cpu/intel/fit/Makefile.inc
+++ b/src/cpu/intel/fit/Makefile.inc
@@ -6,14 +6,14 @@
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
-$(call add_intermediate, add_mcu_fit, $(obj)/coreboot.pre $(IFITTOOL))
+$(call add_intermediate, add_mcu_fit, $(IFITTOOL))
@printf " UPDATE-FIT Microcode\n"
$(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
# Second FIT in TOP_SWAP bootblock
ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
-$(call add_intermediate, add_ts_mcu_fit, $(obj)/coreboot.pre $(IFITTOOL))
+$(call add_intermediate, add_ts_mcu_fit, $(IFITTOOL))
@printf " UPDATE-FIT Top Swap: Microcode\n"
ifneq ($(FIT_ENTRY),)
$(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
diff --git a/src/ec/hp/kbc1126/Makefile.inc b/src/ec/hp/kbc1126/Makefile.inc
index e136757..4d7d46d 100644
--- a/src/ec/hp/kbc1126/Makefile.inc
+++ b/src/ec/hp/kbc1126/Makefile.inc
@@ -16,7 +16,7 @@
ecfw2.bin-type := raw
endif
-$(call add_intermediate, kbc1126_ec_insert, $(obj)/coreboot.pre)
+$(call add_intermediate, kbc1126_ec_insert)
ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
printf " Building kbc1126_ec_insert.\n"
$(MAKE) -C util/kbc1126
diff --git a/src/mainboard/amd/majolica/Makefile.inc b/src/mainboard/amd/majolica/Makefile.inc
index 7472599..8c35d9a 100644
--- a/src/mainboard/amd/majolica/Makefile.inc
+++ b/src/mainboard/amd/majolica/Makefile.inc
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_MAJOLICA_HAVE_MCHP_FW),y)
-$(call add_intermediate, add_mchp_fw, $(obj)/coreboot.pre)
+$(call add_intermediate, add_mchp_fw)
$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MAJOLICA_MCHP_FW_FILE) --fill-upward
else
files_added:: warn_no_mchp
diff --git a/src/mainboard/amd/mandolin/Makefile.inc b/src/mainboard/amd/mandolin/Makefile.inc
index 6644bb3..bff7e63 100644
--- a/src/mainboard/amd/mandolin/Makefile.inc
+++ b/src/mainboard/amd/mandolin/Makefile.inc
@@ -18,7 +18,7 @@
ifeq ($(CONFIG_MANDOLIN_HAVE_MCHP_FW),y)
-$(call add_intermediate, add_mchp_fw, $(obj)/coreboot.pre)
+$(call add_intermediate, add_mchp_fw)
$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MANDOLIN_MCHP_FW_FILE) --fill-upward
else
diff --git a/src/security/intel/cbnt/Makefile.inc b/src/security/intel/cbnt/Makefile.inc
index 06ff213..b612a81 100644
--- a/src/security/intel/cbnt/Makefile.inc
+++ b/src/security/intel/cbnt/Makefile.inc
@@ -6,7 +6,7 @@
boot_policy_manifest.bin-type := raw
boot_policy_manifest.bin-align := 0x10
-$(call add_intermediate, add_bpm_fit, $(obj)/coreboot.pre $(IFITTOOL))
+$(call add_intermediate, add_bpm_fit, $(IFITTOOL))
$(IFITTOOL) -r COREBOOT -a -n boot_policy_manifest.bin -t 12 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
endif
@@ -16,7 +16,7 @@
key_manifest.bin-type := raw
key_manifest.bin-align := 0x10
-$(call add_intermediate, add_km_fit, $(obj)/coreboot.pre $(IFITTOOL))
+$(call add_intermediate, add_km_fit, $(IFITTOOL))
$(IFITTOOL) -r COREBOOT -a -n key_manifest.bin -t 11 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
endif
diff --git a/src/security/intel/txt/Makefile.inc b/src/security/intel/txt/Makefile.inc
index a0d37fb..bac4eb8 100644
--- a/src/security/intel/txt/Makefile.inc
+++ b/src/security/intel/txt/Makefile.inc
@@ -28,7 +28,7 @@
ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
-$(call add_intermediate, add_acm_fit, $(obj)/coreboot.pre $(IFITTOOL))
+$(call add_intermediate, add_acm_fit, $(IFITTOOL))
$(IFITTOOL) -r COREBOOT -a -n $(CONFIG_INTEL_TXT_CBFS_BIOS_ACM) -t 2 \
-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
@@ -41,7 +41,7 @@
ibb-files += bootblock
-$(call add_intermediate, add_ibb_fit, $(obj)/coreboot.pre $(IFITTOOL))
+$(call add_intermediate, add_ibb_fit, $(IFITTOOL))
$(foreach file, $(ibb-files), $(shell $(IFITTOOL) -f $< -a -n $(file) -t 7 \
-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT)) true
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index b55e2fb..db980c8 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -167,7 +167,7 @@
$(call int-shift-left, \
0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
-$(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom)
+$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
"$(STONEYRIDGE_FWM_ROM_POSITION)"
dd if=$(obj)/amdfw.rom \
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index caa49b8..fe78723 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -157,7 +157,7 @@
--output $@
ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
-$(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom)
+$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
printf " DD Adding AMD Firmware\n"
dd if=$(obj)/amdfw.rom \
of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1
