Rowan: gpio: update RAM ID pins for Rowan
RAMD_ID_1 moves to PAD_DSI_TE and RAM_ID_2 moves to PAD_RDP1_A on Rowan.
BUG=chrome-os-partner:62672
BRANCH=none
TEST=emerge-rowan coreboot
Change-Id: I64fd29de607a0b360d355fd3724e3a649adc658b
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/448397
Reviewed-by: Julius Werner <jwerner@chromium.org>
diff --git a/src/mainboard/google/oak/gpio.h b/src/mainboard/google/oak/gpio.h
index 3c0f51a..7a48e51 100644
--- a/src/mainboard/google/oak/gpio.h
+++ b/src/mainboard/google/oak/gpio.h
@@ -21,6 +21,11 @@
: ((board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 7) ? PAD_EINT12 \
: PAD_SPI_CK))
+#define RAM_ID_1 ((IS_ENABLED(CONFIG_BOARD_GOOGLE_ROWAN)) ? PAD_DSI_TE \
+ : PAD_RCN_A)
+
+#define RAM_ID_2 ((IS_ENABLED(CONFIG_BOARD_GOOGLE_ROWAN)) ? PAD_RDP1_A \
+ : PAD_RCP_A)
enum {
/* Board ID related GPIOS. */
@@ -29,8 +34,6 @@
BOARD_ID_2 = PAD_RDN2_A,
/* RAM ID related GPIOS. */
RAM_ID_0 = PAD_RDP2_A,
- RAM_ID_1 = PAD_RCN_A,
- RAM_ID_2 = PAD_RCP_A,
RAM_ID_3 = PAD_RDN1_A,
/* Write Protect */
WRITE_PROTECT = PAD_EINT4,