UPSTREAM: soc/intel/apollolake: fix space indention in pm.h
More spaces missed in review.
Change-Id: I842da05ca6ad4f2c13d2d42433e41da57ccf7f96
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15500
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/357675
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index 8838d1c..8da9088 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -140,17 +140,17 @@
/* Track power state from reset to log events. */
struct chipset_power_state {
- uint16_t pm1_sts;
- uint16_t pm1_en;
- uint32_t pm1_cnt;
- uint32_t gpe0_sts[GPE0_REG_MAX];
- uint32_t gpe0_en[GPE0_REG_MAX];
- uint32_t tco_sts;
- uint32_t prsts;
- uint32_t gen_pmcon1;
- uint32_t gen_pmcon2;
- uint32_t gen_pmcon3;
- uint32_t prev_sleep_state;
+ uint16_t pm1_sts;
+ uint16_t pm1_en;
+ uint32_t pm1_cnt;
+ uint32_t gpe0_sts[GPE0_REG_MAX];
+ uint32_t gpe0_en[GPE0_REG_MAX];
+ uint32_t tco_sts;
+ uint32_t prsts;
+ uint32_t gen_pmcon1;
+ uint32_t gen_pmcon2;
+ uint32_t gen_pmcon3;
+ uint32_t prev_sleep_state;
} __attribute__((packed));
int fill_power_state(struct chipset_power_state *ps);
