commit 9966c430a508a13cf1a617f485a48866bec161ca
author Ryan Lin <ryan.lin@intel.com> Fri Dec 25 10:54:44 2015 +0800
committer chrome-bot <chrome-bot@chromium.org> Sun Jan 03 23:18:48 2016 -0800
tree 828b02b698257458dfd19aa973c454faf31b96a4
parent 8e252123cc73543d0f1b320af9d8873f99a45ab1

Chell: Enable eMMC HS400 mode

With CL317451 and CL317267, Hynix eMMC can run under HS400 mode.

BUG=chrome-os-partner:47647
TEST=run consective boot 100 times on Chell EVT Hynix SKU, and
MMC errors didn't happen.
BRANCH=none

Change-Id: I6bec88f5c2813131a693ddba5523a9d43b2ebd45
Signed-off-by: Ryan Lin <ryan.lin@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/319627
Commit-Ready: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

src/mainboard/google/chell/devicetree.cb

diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb
index 81df06f..ceb1160 100644
--- a/src/mainboard/google/chell/devicetree.cb
+++ b/src/mainboard/google/chell/devicetree.cb
@@ -35,7 +35,7 @@
 	register "SmbusEnable" = "1"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "0"
+	register "ScsEmmcHs400Enabled" = "1"
 	register "ScsSdCardEnabled" = "0"
 	register "IshEnable" = "0"
 	register "PttSwitch" = "0"