Skylake: Enabling L1 substates for PCIe based WIFI
This patch enables L1 substates of PCIe link for power savings.
BUG=none
BRANCH=none
TEST=build and boot coreboot on sklrvp3 and lspci -vvvxxxx shows '1e' cap
(L1ss)is enabled for the wifi module.
Change-Id: Ie03653cdcce452a8878639bff2fd935dc822d9de
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276424
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Naveenkrishna Ch <naveenkrishna.ch@intel.com>
Tested-by: Naveenkrishna Ch <naveenkrishna.ch@intel.com>
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 38613e1..3657f6d 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -35,6 +35,7 @@
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM
+ select PCIEXP_L1_SUB_STATE
select REG_SCRIPT
select RELOCATABLE_RAMSTAGE
select RELOCATABLE_MODULES
