blob: 41b870fbf78ae0ec51ebd265808d858ee0255262 [file] [log] [blame]
config DRIVERS_UART
bool
config DRIVERS_UART_8250IO
# FIXME: Shouldn't have a prompt, should default to n, and
# should be selected by boards that have it instead.
bool "Serial port on SuperIO"
depends on ARCH_X86
default n if DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL
default n if NO_UART_ON_SUPERIO
default y
select DRIVERS_UART
config DRIVERS_UART_8250IO_SKIP_INIT
def_bool n
depends on DRIVERS_UART_8250IO
# Select this for mainboard without SuperIO serial port.
config NO_UART_ON_SUPERIO
def_bool n
config UART_OVERRIDE_INPUT_CLOCK_DIVIDER
bool
default n
help
Set to "y" when the platform overrides the uart_input_clock_divider
routine.
config UART_OVERRIDE_REFCLK
bool
default n
help
Set to "y" when the platform overrides the uart_platform_refclk
routine.
config DRIVERS_UART_8250MEM
bool
default n
select DRIVERS_UART
config DRIVERS_UART_8250MEM_32
bool
default n
select DRIVERS_UART_8250MEM
config HAVE_UART_SPECIAL
bool
default n
select DRIVERS_UART
config DRIVERS_UART_OXPCIE
bool "Oxford OXPCIe952"
default n
depends on PCI && !DRIVERS_UART_8250MEM_32
select DRIVERS_UART_8250MEM
select EARLY_PCI_BRIDGE
select UART_OVERRIDE_REFCLK
help
Support for Oxford OXPCIe952 serial port PCIe cards.
Currently only devices with the vendor ID 0x1415 and device ID
0xc158 or 0xc11b will work.
config DRIVERS_UART_PL011
bool
default n
select HAVE_UART_SPECIAL
config DRIVERS_UART_SIFIVE
bool
select HAVE_UART_SPECIAL
select UART_OVERRIDE_INPUT_CLOCK_DIVIDER
config UART_USE_REFCLK_AS_INPUT_CLOCK
bool
default n
help
Use uart_platform_refclk to specify the input clock value.
config UART_PCI_ADDR
hex "UART's PCI bus, device, function address"
default 0x0
help
Specify zero if the UART is connected to another bus type.
For PCI based UARTs, build the value as:
* 1 << 31 - Valid bit, PCI UART in use
* Bus << 20
* Device << 15
* Function << 12