soc/intel/tigerlake: Add USB ACPI devices for PCH-H

Change-Id: Ia1c1c3d172366ddcc8c194cb2e0b0c2fb2acf678
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
GitOrigin-RevId: d0bf24750623561fd2ea3d349853e061224931b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3114873
Tested-by: Copybara Service <copybara-worker-blackhole@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
diff --git a/src/soc/intel/tigerlake/acpi/xhci.asl b/src/soc/intel/tigerlake/acpi/xhci.asl
index 065938e..4215185 100644
--- a/src/soc/intel/tigerlake/acpi/xhci.asl
+++ b/src/soc/intel/tigerlake/acpi/xhci.asl
@@ -24,6 +24,41 @@
 
 	}
 
+#if CONFIG(SOC_INTEL_TIGERLAKE_PCH_H)
+	/* Root Hub for Tigerlake-H PCH */
+	Device (RHUB)
+	{
+		Name (_ADR, Zero)
+
+		/* USB2 */
+		Device (HS01) { Name (_ADR, 1) }
+		Device (HS02) { Name (_ADR, 2) }
+		Device (HS03) { Name (_ADR, 3) }
+		Device (HS04) { Name (_ADR, 4) }
+		Device (HS05) { Name (_ADR, 5) }
+		Device (HS06) { Name (_ADR, 6) }
+		Device (HS07) { Name (_ADR, 7) }
+		Device (HS08) { Name (_ADR, 8) }
+		Device (HS09) { Name (_ADR, 9) }
+		Device (HS10) { Name (_ADR, 10) }
+		Device (HS11) { Name (_ADR, 11) }
+		Device (HS12) { Name (_ADR, 12) }
+		Device (HS13) { Name (_ADR, 13) }
+		Device (HS14) { Name (_ADR, 14) }
+
+		/* USB3 */
+		Device (SS01) { Name (_ADR, 15) }
+		Device (SS02) { Name (_ADR, 16) }
+		Device (SS03) { Name (_ADR, 17) }
+		Device (SS04) { Name (_ADR, 18) }
+		Device (SS05) { Name (_ADR, 19) }
+		Device (SS06) { Name (_ADR, 20) }
+		Device (SS07) { Name (_ADR, 21) }
+		Device (SS08) { Name (_ADR, 22) }
+		Device (SS09) { Name (_ADR, 23) }
+		Device (SS10) { Name (_ADR, 24) }
+	}
+#else
 	/* Root Hub for Tigerlake-LP PCH */
 	Device (RHUB)
 	{
@@ -47,4 +82,5 @@
 		Device (SS03) { Name (_ADR, 15) }
 		Device (SS04) { Name (_ADR, 16) }
 	}
+#endif /* CONFIG(SOC_INTEL_TIGERLAKE_PCH_H) */
 }
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index dcdaa1a..6994d94 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -54,6 +54,11 @@
 			case 7: return "HS08";
 			case 8: return "HS09";
 			case 9: return "HS10";
+			/* PCH-H only */
+			case 10: return "HS11";
+			case 11: return "HS12";
+			case 12: return "HS13";
+			case 13: return "HS14";
 			}
 			break;
 		case 3:
@@ -63,6 +68,13 @@
 			case 1: return "SS02";
 			case 2: return "SS03";
 			case 3: return "SS04";
+			/* PCH-H only */
+			case 4: return "SS05";
+			case 5: return "SS06";
+			case 6: return "SS07";
+			case 7: return "SS08";
+			case 8: return "SS09";
+			case 9: return "SS10";
 			}
 			break;
 		}