commit f01daa9f6c90933dee1997320d43d3a3a73bc36a
author Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Fri Aug 06 11:00:25 2021 +0800
committer Commit Bot <commit-bot@chromium.org> Mon Aug 09 15:12:12 2021 +0000
tree c008119a430284dfa8131e2d80347f770819f1d5
parent c890456f2b90cadbfc1f6d227177fd92315ea85a

vc/mediatek/mt8195: Optimize DRAM init time by limiting frequency count

Support the config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT to limit DRAM
frequency counts to reduce DRAM initialization time by about 100ms.

BUG=b:195274787

Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: Ibcb9a50c24f428358ef682b64946d4c91ebd81d2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
GitOrigin-RevId: eb94a4a6de5d4de483c99cbaead364fdde73e2d1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3077579
Tested-by: Copybara Service <copybara-worker-blackhole@google.com>
Tested-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@chromium.org>
Commit-Queue: Yu-Ping Wu <yupingso@chromium.org>

src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c

diff --git a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
index b5de592..b5b9ae1 100644
--- a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
+++ b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
@@ -1882,6 +1882,9 @@
     ett_fix_freq = 1; /* only 1600 & 4266 */
 #endif
 
+    if (CONFIG(MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT))
+        ett_fix_freq = 0x1; // 4266, 1600
+
     if (ett_fix_freq != 0xff)
         gAndroid_DVFS_en = FALSE;