commit | 56779abd67462f3f2c234038e37a80dc4343c14a | [log] [tgz] |
---|---|---|
author | Nick Vaccaro <nvaccaro@google.com> | Tue May 11 16:41:37 2021 -0700 |
committer | Commit Bot <commit-bot@chromium.org> | Sat May 15 03:09:59 2021 +0000 |
tree | 296f0981eec806697eedbeb176efcb2c3d4fdaf7 | |
parent | c15bd7832f4c3a1e9edb636931f0787c325d3211 [diff] |
UPSTREAM: mb/google/volteer: Configure TCSS OC pins TCSS OC pins have not been correctly configured for volteer. This patch fills the value from devicetree to correct the OC pins mapping. BUG=b:184660529 BRANCH=None TEST="emerge-volteer coreboot chromeos-bootimage", flash volteer2 and verify CpuUsb3OverCurrentPin UPDs get set correctly. Change-Id: Ic32f615b65297d5c47728b84029c86a1fe254f62 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Original-Commit-Id: 97b608feed7fddf40a586ca3600b35bc877aa341 Original-Change-Id: I12da755a1d3b9ec3ed0a2dbfb0782313dd49c7e9 Original-Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/54076 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Zhuohao Lee <zhuohao@google.com> Original-Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2898064
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index fdac104..0f440f5 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -111,6 +111,9 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 Camera + register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC3)" + register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC0)" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201"