commit | 9c376cba2043a866082054d479a2264eec71d8c0 | [log] [tgz] |
---|---|---|
author | Frans Hendriks <fhendriks@eltan.com> | Wed Apr 07 11:16:17 2021 +0200 |
committer | Commit Bot <commit-bot@chromium.org> | Thu Apr 08 18:21:51 2021 +0000 |
tree | 411d5f121ecdd13d6b85bd33fcc0b3eb32ecb93b | |
parent | ce681418f97a3957c03cf38ca7017ab43af54cff [diff] |
UPSTREAM: mb/facebook/fbg1701/Kconfig: Remove CACHE_MRC_SETTINGS The CACHE_MRC_SETTINGS option is already selected in SoC Kconfig. BUG = N/A TEST = Build and boot facebook FBG1701 BUG=none BRANCH=none TEST=none Change-Id: I871b991034095b264a5f5582ff2818664257a576 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b640e22a419f3240d9dde582fe7464ddd52fbe4b Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Change-Id: I1c7fd5ec36726724939660bf506a45a44848f8c4 Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/52152 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2815013 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig index e01f979..1c47247 100644 --- a/src/mainboard/facebook/fbg1701/Kconfig +++ b/src/mainboard/facebook/fbg1701/Kconfig
@@ -16,7 +16,6 @@ select SOC_INTEL_COMMON_BLOCK_HDA_VERB select PCIEXP_L1_SUB_STATE select HAVE_FSP_BIN - select CACHE_MRC_SETTINGS select DISABLE_HPET select INTEL_GMA_HAVE_VBT select HAVE_SPD_IN_CBFS