| commit | e60c18c91a704aedb55d9c13f67b3cc6842119f0 | [log] [tgz] |
|---|---|---|
| author | Xi Chen <xixi.chen@mediatek.com> | Fri Mar 12 11:15:45 2021 +0800 |
| committer | Commit Bot <commit-bot@chromium.org> | Tue Mar 16 17:27:19 2021 +0000 |
| tree | 2decc823ed9a2fff1aa6e0d90438e815c19f7521 | |
| parent | 2619a5f24861bec431532ec69cd8cfc4f870d05c [diff] |
UPSTREAM: vendorcode/mt8192: fix fast-k gating PI P1 initialization In RX Gating flow, PI P1 delay is missing, so re-add the initialization. BUG=none BRANCH=none TEST=none Change-Id: I02acaedc640455aa63840072b8c8e2e9bdb43d73 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Original-Commit-Id: b8f03fd0cadffdd735cc0951b73e9460a58c9b1f Original-Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Original-Change-Id: Ic72ccecd205062ee79f6928993fac772fc10f880 Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/51425 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2763212 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c b/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c index 1181cdc..1540770 100644 --- a/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c +++ b/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c
@@ -4586,6 +4586,7 @@ best_win->best_dqsien_dly_ui_p1[dqs_i] / ui_per_mck; best_win->best_dqsien_dly_ui_p1[dqs_i] = best_win->best_dqsien_dly_ui_p1[dqs_i] % ui_per_mck; + best_win->best_dqsien_dly_pi_p1[dqs_i] = best_win->best_dqsien_dly_pi[dqs_i]; vSetCalibrationResult(p, DRAM_CALIBRATION_GATING, DRAM_FAST_K);