| config SOC_INTEL_COMMON_BLOCK_CPU |
| bool |
| default n |
| help |
| This option selects Intel Common CPU Model support code |
| which provides various CPU related APIs which are common |
| between all Intel Processor families. Common CPU code is supported |
| for SOCs starting from SKL,KBL,APL, and future. |
| |
| config SOC_INTEL_COMMON_BLOCK_CPU_MPINIT |
| bool |
| default n |
| help |
| This option selects Intel Common CPU MP Init code. In |
| this common MP Init mechanism, the MP Init is occurring before |
| calling FSP Silicon Init. Hence, MP Init will be pulled to |
| BS_DEV_INIT_CHIPS Entry. And on Exit of BS_DEV_INIT, it is |
| ensured that all MTRRs are re-programmed based on the DRAM |
| resource settings. |
| |
| config SOC_INTEL_COMMON_BLOCK_CAR |
| bool |
| default n |
| help |
| This option allows you to select how cache-as-ram (CAR) is set up. |
| |
| config INTEL_CAR_NEM |
| bool |
| default n |
| help |
| Traditionally, CAR is set up by using Non-Evict mode. This method |
| does not allow CAR and cache to co-exist, because cache fills are |
| blocked in NEM. |
| |
| config INTEL_CAR_CQOS |
| bool |
| default n |
| help |
| Cache Quality of Service allows more fine-grained control of cache |
| usage. As result, it is possible to set up a portion of L2 cache for |
| CAR and use the remainder for actual caching. |
| |
| config INTEL_CAR_NEM_ENHANCED |
| bool |
| default n |
| help |
| A current limitation of NEM (Non-Evict mode) is that code and data sizes |
| are derived from the requirement to not write out any modified cache line. |
| With NEM, if there is no physical memory behind the cached area, |
| the modified data will be lost and NEM results will be inconsistent. |
| ENHANCED NEM guarantees that modified data is always |
| kept in cache while clean data is replaced. |
| |
| config USE_INTEL_FSP_MP_INIT |
| bool "Perform MP Initialization by FSP" |
| default n |
| depends on !USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI |
| help |
| This option allows FSP to perform multiprocessor initialization. |
| |
| config USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI |
| bool "Perform MP Initialization by FSP using coreboot MP PPI service" |
| depends on FSP_USES_MP_SERVICES_PPI |
| default y if FSP_PEIM_TO_PEIM_INTERFACE |
| default n |
| help |
| This option allows FSP to make use of MP services PPI published by |
| coreboot to perform multiprocessor initialization. |
