UPSTREAM: Kconfig: Add config to insert ucode address in second FIT
This config is used to provide the name of a region where a microcode
is located. The address of this will be added as the first entry in
the FIT of the topswap bootblock.
This adds a capability to associate two microcodes for each
of the two bootblocks, this allows for the CPU to boot with different
microcodes with 2 separate bootblocks.
BUG=none
BRANCH=none
TEST=none
Change-Id: I85d05eb90d857028700a4b0d7921190d4a2392db
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 53485124513a76ebe85a80f59e8dff9915f518bd
Original-Change-Id: I4ee41d90bae34862aa68c9b8bd69288de1335585
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Reviewed-on: https://review.coreboot.org/27151
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1143259
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/Makefile.inc b/Makefile.inc
index c8fefa1..6884a90 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -958,6 +958,7 @@
ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
TS_OPTIONS := -j $(CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE)
+FIT_OPTIONS := $(TS_OPTIONS)
endif
ifneq ($(CONFIG_UPDATE_IMAGE),y)
$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap $(obj)/fmap.desc
@@ -1003,6 +1004,11 @@
$(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@
endif
+FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG))
+ifneq ($(FIT_ENTRY),)
+FIT_OPTIONS += -q $(FIT_ENTRY)
+endif
+
$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $$(INTERMEDIATE)
@printf " CBFS $(subst $(obj)/,,$(@))\n"
# The full ROM may be larger than the CBFS part, so create an empty
@@ -1020,12 +1026,14 @@
ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
@printf " UPDATE-FIT\n"
- $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES)
+ $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \
+ $(FIT_OPTIONS)
endif
ifeq ($(CONFIG_CPU_MICROCODE_CBFS_GENERATE),y)
@printf " UPDATE-FIT\n"
- $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES)
+ $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \
+ $(FIT_OPTIONS)
endif
endif
mv $@.tmp $@
diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig
index fb2643b..5b4a9a2 100644
--- a/src/soc/intel/Kconfig
+++ b/src/soc/intel/Kconfig
@@ -37,3 +37,14 @@
help
Set this config to a supported topswap size.
Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000
+
+config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
+ string
+ depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
+ help
+ Use this config to specify the name of a FMAP region (which should
+ hold a microcode) whose address as the first entry in the topswap FIT.
+ This is useful in creating a asymmetric FIT in top swap bootblock
+ than the one in non-topswap bootblock. This string will be passed
+ onto cbfstool (-q option). cbfstool will not parse the region for MCU
+ entries, and only locate the region and insert its address into FIT.
