blob: 19efb004ccac06491ffd165c90af61f306a16cf5 [file] [log] [blame]
config SERIAL_CPU_INIT
bool
default y
config WAIT_BEFORE_CPUS_INIT
bool
default n
config UDELAY_IO
bool
default y if !UDELAY_LAPIC && !UDELAY_TSC
default n
config UDELAY_LAPIC
bool
default n
config UDELAY_TSC
bool
default n
config TSC_CALIBRATE_WITH_IO
bool
default n
config XIP_ROM_BASE
hex
default 0xffff0000
config XIP_ROM_SIZE
hex
default 0x10000
config CPU_ADDR_BITS
int
default 36
config LOGICAL_CPUS
bool
default y
config CACHE_ROM
bool
default n
config SMM_TSEG
bool
default n
config SMM_TSEG_SIZE
hex
default 0