UPSTREAM: mb/google/arcada: Enable bayhub 720 on Arcada
Add PCIe-eMMC bridge bayhub 720 on Arcada to the devicetree.
BUG=b:157971972
BRANCH=sarien
TEST=local build and boot from SATA/PCIe-eMMC storage successfully
Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Commit-Id: e00db59c7c14c5914eab34fbf0c4b929cb50d2eb
Original-Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Original-Change-Id: I7e925730e57806e7398684dffd0d3bd1f4f9deeb
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/43669
Original-Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Original-Reviewed-by: Mathew King <mathewk@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Change-Id: Id884fffc311b7af96e2c5832adb50f2d68bfe193
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2318330
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: Mathew King <mathewk@chromium.org>
Commit-Queue: Mathew King <mathewk@chromium.org>
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 7a6650d..7995712 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -379,6 +379,10 @@
device pci 1d.2 on end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12
device pci 1d.4 on
+ chip drivers/generic/bayhub
+ register "power_saving" = "1"
+ device pci 00.0 on end
+ end
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
end # PCI Express Port 13 (x4)
device pci 1e.0 off end # UART #0
