UPSTREAM: sb/intel/common: Use new acpigen_write_PRT_*_entry functions
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Martin Roth <gaumless@gmail.com>
Original-Commit-Id: 53d08b6ee292fdef0affe9232d05bd403539f4d8
Original-Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Original-Change-Id: I9f573b9bd40260ab963c5a4a965a6ac483af91ec
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/51158
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Change-Id: I59d3ccecb61b55caef7a9aae6ff2c91af3bca332
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2785595
Reviewed-by: Martin Roth <martinroth@google.com>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index 73d1019..18def9b 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
+#include <acpi/acpigen_pci.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
@@ -52,20 +53,16 @@
pirq = pci_int_mapping[pci_dev][int_pin];
if (pirq == PIRQ_NONE)
continue;
- acpigen_write_package(4);
- acpigen_write_dword((pci_dev << 16) | 0xffff);
- acpigen_write_byte(int_pin);
+
if (emit == EMIT_APIC) {
- acpigen_write_zero();
- acpigen_write_dword(16 + pirq - PIRQ_A);
+ const unsigned int gsi = 16 + pirq - PIRQ_A;
+ acpigen_write_PRT_GSI_entry(pci_dev, int_pin, gsi);
} else {
snprintf(buffer, sizeof(buffer),
- "%s.LNK%c",
- lpcb_path, 'A' + pirq - PIRQ_A);
- acpigen_emit_namestring(buffer);
- acpigen_write_dword(0);
+ "%s.LNK%c",
+ lpcb_path, 'A' + pirq - PIRQ_A);
+ acpigen_write_PRT_source_entry(pci_dev, int_pin, buffer, 0);
}
- acpigen_pop_len();
}
}
}
