commit | 75bcaf287019957dd30814f2f274935c12fc5e39 | [log] [tgz] |
---|---|---|
author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | Thu Apr 15 11:43:02 2021 +0800 |
committer | Commit Bot <commit-bot@chromium.org> | Sat May 01 09:00:15 2021 +0000 |
tree | 48f9fb22fc0267fb1640f1bf2851def65201893e | |
parent | 9a51096aa6854adce4f0241db310ab53c3c490e8 [diff] |
UPSTREAM: mb/google/octopus/var/fleex: Add ssfc codec cs42l42 support Add cs42l42 codec support in fleex. BUG=b:184103445 TEST=boot to check cs42l42 is functional. Change-Id: Id9306f6a4cf396f4f8f247a633d25f388d8a058d Original-Commit-Id: 598f2babdcff16698b5928126f7cd8203120a8ea Original-Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Original-Change-Id: I1571003f8b272a573e6ab9fb525f17659bae8c4c Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/52363 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2847972 (cherry picked from commit 7f6766032aa496b6eba431b702a19deb671eb26b) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2848724 Commit-Queue: Henry Sun <henrysun@google.com> Reviewed-by: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com> (cherry picked from commit 7fe9487983ce239f62450c2c0d0c1719f9d4d4b3) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2859558 Tested-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Auto-Submit: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.