qclib: Update qclib DDR Training data section
The DDR bitflips,corruption issues seen with 739 MHz DDR Freq are
not seen with DDR Freq 672 MHz. Next release of coreboot will
have DDR freq set to 672 MHz. But with change in DDR freq, there
is a need of DDR Training Data update. Currently "RO_DDR_TRAINING"
section is used for DDR Training data. But we can not use this
section as its Factory locked and can not be updated.
So we need to use other section for DDR Training data update which
is "RW_DDR_TRAINING".
BUG=b:141614863
BRANCH=mistral
TEST=firmware autoupdate
Change-Id: I63e9751fc99a22b31b8d247de75f55b8adb30bb5
Signed-off-by: Vijay Navnath Kamble <vkambl@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2077257
Reviewed-by: nsekar nsekar <nsekar1@qualcomm.corp-partner.google.com>
Reviewed-by: Yuji Sasaki <sasakiy@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Yuji Sasaki <sasakiy@google.com>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/src/soc/qualcomm/common/include/soc/qclib_common.h b/src/soc/qualcomm/common/include/soc/qclib_common.h
index 129465c..5774ce6 100644
--- a/src/soc/qualcomm/common/include/soc/qclib_common.h
+++ b/src/soc/qualcomm/common/include/soc/qclib_common.h
@@ -24,7 +24,7 @@
#define QCLIB_TE_NAME_LENGTH 24
/* FMAP_REGION names */
-#define QCLIB_FR_DDR_TRAINING_DATA "RO_DDR_TRAINING"
+#define QCLIB_FR_DDR_TRAINING_DATA "RW_DDR_TRAINING"
#define QCLIB_FR_LIMITS_CFG_DATA "RO_LIMITS_CFG"
/* TE_NAME (table entry name) */
