commit d7703cac436aec0b5ebb99ef7a93759633f40434
author Duncan Laurie <dlaurie@chromium.org> Mon Sep 30 14:12:47 2013 -0700
committer chrome-internal-fetch <chrome-internal-fetch@google.com> Mon Sep 30 23:28:34 2013 +0000
tree 2281cef4de7e621bd3cf3133dcaf098b9c8e64bb
parent 203d200268f4af6445224962190cbc66ad2a83e4

falco: Add support for Samsung memory

New SPD and update to the SPD map.  Add both a 4GB and 2GB option.

4GB = RAM_ID{1,1,0}
2GB = RAM_ID{1,1,1}

BUG=chrome-os-partner:22995
BRANCH=falco
TEST=emerge-falco chromeos-coreboot-falco

Change-Id: I37318c1b5a6ee84b7c55da00d326f10fe8af6f1e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171110
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/google/falco/Makefile.inc

diff --git a/src/mainboard/google/falco/Makefile.inc b/src/mainboard/google/falco/Makefile.inc
index 50a47a5..9aafb62 100644
--- a/src/mainboard/google/falco/Makefile.inc
+++ b/src/mainboard/google/falco/Makefile.inc
@@ -28,12 +28,14 @@
 SPD_BIN = $(obj)/spd.bin
 
 # Order of names in SPD_SOURCES is important!
-SPD_SOURCES  = Micron_4KTF25664HZ     # 4GB / CH0 + CH1
-SPD_SOURCES += Hynix_HMT425S6AFR6A    # 4GB / CH0 + CH1
-SPD_SOURCES += Elpida_EDJ4216EFBG     # 4GB / CH0 + CH1
-SPD_SOURCES += Micron_4KTF25664HZ     # 2GB / CH0 only
-SPD_SOURCES += Hynix_HMT425S6AFR6A    # 2GB / CH0 only
-SPD_SOURCES += Elpida_EDJ4216EFBG     # 2GB / CH0 only
+SPD_SOURCES  = Micron_4KTF25664HZ     # 4GB / CH0 + CH1 (RAM_ID=000)
+SPD_SOURCES += Hynix_HMT425S6AFR6A    # 4GB / CH0 + CH1 (RAM_ID=001)
+SPD_SOURCES += Elpida_EDJ4216EFBG     # 4GB / CH0 + CH1 (RAM_ID=010)
+SPD_SOURCES += Micron_4KTF25664HZ     # 2GB / CH0 only  (RAM_ID=011)
+SPD_SOURCES += Hynix_HMT425S6AFR6A    # 2GB / CH0 only  (RAM_ID=100)
+SPD_SOURCES += Elpida_EDJ4216EFBG     # 2GB / CH0 only  (RAM_ID=101)
+SPD_SOURCES += Samsung_M471B5674QH0   # 4GB / CH0 + CH1 (RAM_ID=110)
+SPD_SOURCES += Samsung_M471B5674QH0   # 2GB / CH0 only  (RAM_ID=111)
 
 SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/$(f).spd.hex)
 

src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex

diff --git a/src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex b/src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex
new file mode 100644
index 0000000..c2a23cd
--- /dev/null
+++ b/src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex
@@ -0,0 +1,17 @@
+# Samsung M471B5674QH0-YK0 (K4B4G1646Q)
+92 12 0B 03 04 19 02 02 03 11 01 08 0A 00 FE 00
+69 78 69 3C 69 11 18 81 20 08 3C 3C 01 40 83 01
+00 00 00 00 00 00 00 00 00 88 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 0F 01 11 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 CE 01 00 00 00 00 00 00 6C F9
+4D 34 37 31 42 35 36 37 34 51 48 30 2D 59 4B 30
+20 20 00 00 80 CE 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

src/mainboard/google/falco/romstage.c

diff --git a/src/mainboard/google/falco/romstage.c b/src/mainboard/google/falco/romstage.c
index 0ad4b97..d95c326 100644
--- a/src/mainboard/google/falco/romstage.c
+++ b/src/mainboard/google/falco/romstage.c
@@ -91,11 +91,13 @@
 	if (spd_file->len < sizeof(peid->spd_data[0]))
 		die("Missing SPD data.");
 
-	/* Index 0-2 are 4GB config with both CH0 and CH1
-	 * Index 3-5 are 2GB config with CH0 only
+	/* Index 0-2,6 are 4GB config with both CH0 and CH1
+	 * Index 3-5,7 are 2GB config with CH0 only
 	 */
-	if (spd_index > 2)
+	switch (spd_index) {
+	case 3: case 4: case 5: case 7:
 		peid->dimm_channel1_disabled = 3;
+	}
 
 	memcpy(peid->spd_data[0],
 	       ((char*)CBFS_SUBHEADER(spd_file)) +