Samus: Enable builds without SMI handler
Enable easier CPU bringup by allowing features to be disabled. This
change allows the SOC and board support to be able to be successfully
built when the SMI handler is not present.
BRANCH=none
BUG=None
TEST=Use the following steps for testing
1. Comment out CONFIG_HAVE_SMI_HANDLER=y in configs/config.samus
2. For Sawtooth Peak in src/mainboard/google/samus comment out:
a. EC_GOOGLE_CHROMEEC
b. EC_SOFTWARE_SYNC
2. Build and run on Samus
Change-Id: I6877991444829c0d98a54a5291ae6779763a28a7
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/217839
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index bed77de..5d95fe7 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -13,7 +13,11 @@
void smm_init(void);
void smm_lock(void);
void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
-#endif
+#else /* CONFIG_HAVE_SMI_HANDLER */
+static inline void smm_init(void) {}
+static inline void smm_lock(void) {}
+static inline void smm_setup_structures(void *gnvs, void *tcg, void *smi1) {}
+#endif /* CONFIG_HAVE_SMI_HANDLER */
#define __cpu_driver __attribute__ ((used,__section__(".rodata.cpu_driver")))
/** start of compile time generated pci driver array */
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index a84b496..1feae62 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -578,7 +578,12 @@
#endif /* CONFIG_SMM_MODULES */
/* Backup and restore default SMM region. */
+#if CONFIG_HAVE_SMI_HANDLER
void *backup_default_smm_area(void);
void restore_default_smm_area(void *smm_save_area);
+#else /* CONFIG_HAVE_SMI_HANDLER */
+static inline void *backup_default_smm_area(void) { return NULL; }
+static inline void restore_default_smm_area(void *smm_save_area) {}
+#endif /* CONFIG_HAVE_SMI_HANDLER */
#endif
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 072ab1f..c227dfd 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -4,10 +4,10 @@
subdirs-y += ../common
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
+subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm
ramstage-y += acpi.c
ramstage-y += adsp.c
@@ -47,9 +47,9 @@
ramstage-y += smbus.c
ramstage-y += smbus_common.c
romstage-y += smbus_common.c
-ramstage-y += smi.c
-smm-y += smihandler.c
-ramstage-y += smmrelocate.c
+ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
+ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
ramstage-y += spi.c
smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
ramstage-y += spi_loading.c
diff --git a/src/soc/intel/broadwell/broadwell/smm.h b/src/soc/intel/broadwell/broadwell/smm.h
index a6d896f..8716884 100644
--- a/src/soc/intel/broadwell/broadwell/smm.h
+++ b/src/soc/intel/broadwell/broadwell/smm.h
@@ -57,6 +57,7 @@
return CONFIG_SMM_TSEG_SIZE;
}
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
int smm_initialize(void);
void smm_relocate(void);
@@ -69,5 +70,13 @@
* SMIs. They are split so that other work between the 2 actions. */
void southbridge_smm_clear_state(void);
void southbridge_smm_enable_smi(void);
+#else /* CONFIG_HAVE_SMI_HANDLER */
+static inline int smm_initialize(void) { return 0; };
+static inline void smm_relocate(void) {}
+static inline void southbridge_trigger_smi(void) {}
+static inline void southbridge_clear_smi_status(void) {}
+static inline void southbridge_smm_clear_state(void) {}
+static inline void southbridge_smm_enable_smi(void) {}
+#endif /* CONFIG_HAVE_SMI_HANDLER */
#endif
