UPSTREAM: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Wyvern
V.2: Spare USB routed internally to another peripheral and so
no plug event hook needed.
BUG=b:1603699358,b:157479891
BRANCH=none
TEST=none
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Original-Commit-Id: 7b2f5030382ada910c0a4a7dd89af0447208e988
Original-Change-Id: Ideacac417a46b96f3e82b53bbb341ecce79ee420
Original-Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/42994
Original-Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Change-Id: Id66a3e28e96b00ba6abf22f41fcffb5a789e97d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2279448
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
diff --git a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
index 55ce5ea..c394977 100644
--- a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
@@ -81,6 +81,16 @@
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4
+ # Bitmap for Wake Enable on USB attach/detach
+ register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
+ USB_PORT_WAKE_ENABLE(2) | \
+ USB_PORT_WAKE_ENABLE(3) | \
+ USB_PORT_WAKE_ENABLE(6)"
+ register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
+ USB_PORT_WAKE_ENABLE(2) | \
+ USB_PORT_WAKE_ENABLE(3) | \
+ USB_PORT_WAKE_ENABLE(5)"
+
# Enable eMMC HS400
register "ScsEmmcHs400Enabled" = "1"
