| commit | d9af82b995478f480baecf63851952855d0e441b | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Mon Mar 01 14:36:37 2021 +0100 |
| committer | Commit Bot <commit-bot@chromium.org> | Fri Mar 05 22:00:53 2021 +0000 |
| tree | a5fabdb2115d4a9b3c2b678b46be5e9395173bf0 | |
| parent | f5ba98203b4edfd1486c2181f2467ee58c71ba52 [diff] |
UPSTREAM: sb/ti/pcixx12: Remove NOOP chip driver BUG=none BRANCH=none TEST=none Change-Id: Ibea41ae8270c10a05fefcbf91a1a3c6c355ef66d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 54c04d5536f7479db861f8d555ce0d8964965b95 Original-Change-Id: I46bc854239e723a1685279f634e635b72e7b3af9 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/51135 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2739716 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index 230cad4..94ffd19 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb
@@ -64,11 +64,7 @@ device pci 1d.2 on end # USB UHCI device pci 1d.3 on end # USB UHCI device pci 1d.7 on end # USB2 EHCI - device pci 1e.0 on - chip southbridge/ti/pcixx12 - - end - end # PCI bridge + device pci 1e.0 on end # PCI bridge device pci 1e.2 off end # AC'97 Audio device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge
diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c index dec3577..f1c0a4a 100644 --- a/src/southbridge/ti/pcixx12/pcixx12.c +++ b/src/southbridge/ti/pcixx12/pcixx12.c
@@ -38,12 +38,3 @@ .vendor = 0x104c, .device = 0x8039, }; - -static void southbridge_init(struct device *dev) -{ -} - -struct chip_operations southbridge_ti_pcixx12_ops = { - CHIP_NAME("Texas Instruments PCIxx12 Cardbus Controller") - .enable_dev = southbridge_init, -};