arm: libpayload: Make cache invalidation take pointers instead of integers
This minor refactoring patch changes the signature of all limited cache
invalidation functions in Coreboot and libpayload from unsigned long to
void * for the address argument, since that's really what you have in
95% of the cases and I think it's ugly to have casting boilerplate all
over the place.
CQ-DEPEND=CL:167358
BUG=chrome-os-partner:21969
TEST=Make sure all payloads still compile cleanly when this and
dependent changes are in.
Change-Id: Ic9d3b2ea70b6aa8aea6647adae43ee2183b4e065
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167338
diff --git a/payloads/libpayload/arch/armv7/cache.c b/payloads/libpayload/arch/armv7/cache.c
index b4a937b..1f466ce 100644
--- a/payloads/libpayload/arch/armv7/cache.c
+++ b/payloads/libpayload/arch/armv7/cache.c
@@ -213,16 +213,15 @@
* perform cache maintenance on a particular memory range rather than the
* entire cache.
*/
-static void dcache_op_mva(unsigned long addr,
- unsigned long len, enum dcache_op op)
+static void dcache_op_mva(void const *addr, size_t len, enum dcache_op op)
{
unsigned long line, linesize;
linesize = line_bytes();
- line = addr & ~(linesize - 1);
+ line = (uint32_t)addr & ~(linesize - 1);
dsb();
- while (line < addr + len) {
+ while ((void *)line < addr + len) {
switch(op) {
case OP_DCCIMVAC:
dccimvac(line);
@@ -241,17 +240,17 @@
isb();
}
-void dcache_clean_by_mva(unsigned long addr, unsigned long len)
+void dcache_clean_by_mva(void const *addr, size_t len)
{
dcache_op_mva(addr, len, OP_DCCMVAC);
}
-void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len)
+void dcache_clean_invalidate_by_mva(void const *addr, size_t len)
{
dcache_op_mva(addr, len, OP_DCCIMVAC);
}
-void dcache_invalidate_by_mva(unsigned long addr, unsigned long len)
+void dcache_invalidate_by_mva(void const *addr, size_t len)
{
dcache_op_mva(addr, len, OP_DCIMVAC);
}
diff --git a/payloads/libpayload/include/armv7/arch/cache.h b/payloads/libpayload/include/armv7/arch/cache.h
index 0756f11..1cd9958 100644
--- a/payloads/libpayload/include/armv7/arch/cache.h
+++ b/payloads/libpayload/include/armv7/arch/cache.h
@@ -32,6 +32,7 @@
#ifndef ARMV7_CACHE_H
#define ARMV7_CACHE_H
+#include <stddef.h>
#include <stdint.h>
/* SCTLR bits */
@@ -290,13 +291,13 @@
void dcache_clean_invalidate_all(void);
/* dcache clean by modified virtual address to PoC */
-void dcache_clean_by_mva(unsigned long addr, unsigned long len);
+void dcache_clean_by_mva(void const *addr, size_t len);
/* dcache clean and invalidate by modified virtual address to PoC */
-void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len);
+void dcache_clean_invalidate_by_mva(void const *addr, size_t len);
/* dcache invalidate by modified virtual address to PoC */
-void dcache_invalidate_by_mva(unsigned long addr, unsigned long len);
+void dcache_invalidate_by_mva(void const *addr, size_t len);
void dcache_clean_all(void);
diff --git a/src/arch/armv7/cache.c b/src/arch/armv7/cache.c
index b4a937b..1f466ce 100644
--- a/src/arch/armv7/cache.c
+++ b/src/arch/armv7/cache.c
@@ -213,16 +213,15 @@
* perform cache maintenance on a particular memory range rather than the
* entire cache.
*/
-static void dcache_op_mva(unsigned long addr,
- unsigned long len, enum dcache_op op)
+static void dcache_op_mva(void const *addr, size_t len, enum dcache_op op)
{
unsigned long line, linesize;
linesize = line_bytes();
- line = addr & ~(linesize - 1);
+ line = (uint32_t)addr & ~(linesize - 1);
dsb();
- while (line < addr + len) {
+ while ((void *)line < addr + len) {
switch(op) {
case OP_DCCIMVAC:
dccimvac(line);
@@ -241,17 +240,17 @@
isb();
}
-void dcache_clean_by_mva(unsigned long addr, unsigned long len)
+void dcache_clean_by_mva(void const *addr, size_t len)
{
dcache_op_mva(addr, len, OP_DCCMVAC);
}
-void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len)
+void dcache_clean_invalidate_by_mva(void const *addr, size_t len)
{
dcache_op_mva(addr, len, OP_DCCIMVAC);
}
-void dcache_invalidate_by_mva(unsigned long addr, unsigned long len)
+void dcache_invalidate_by_mva(void const *addr, size_t len)
{
dcache_op_mva(addr, len, OP_DCIMVAC);
}
diff --git a/src/arch/armv7/include/arch/cache.h b/src/arch/armv7/include/arch/cache.h
index 0756f11..1cd9958 100644
--- a/src/arch/armv7/include/arch/cache.h
+++ b/src/arch/armv7/include/arch/cache.h
@@ -32,6 +32,7 @@
#ifndef ARMV7_CACHE_H
#define ARMV7_CACHE_H
+#include <stddef.h>
#include <stdint.h>
/* SCTLR bits */
@@ -290,13 +291,13 @@
void dcache_clean_invalidate_all(void);
/* dcache clean by modified virtual address to PoC */
-void dcache_clean_by_mva(unsigned long addr, unsigned long len);
+void dcache_clean_by_mva(void const *addr, size_t len);
/* dcache clean and invalidate by modified virtual address to PoC */
-void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len);
+void dcache_clean_invalidate_by_mva(void const *addr, size_t len);
/* dcache invalidate by modified virtual address to PoC */
-void dcache_invalidate_by_mva(unsigned long addr, unsigned long len);
+void dcache_invalidate_by_mva(void const *addr, size_t len);
void dcache_clean_all(void);
diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c
index 3646c2a..bdeef05 100644
--- a/src/cpu/samsung/exynos5250/cpu.c
+++ b/src/cpu/samsung/exynos5250/cpu.c
@@ -125,7 +125,7 @@
uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
- dcache_clean_invalidate_by_mva(lower, upper - lower);
+ dcache_clean_invalidate_by_mva((void *)lower, upper - lower);
mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF);
printk(BIOS_DEBUG, "Initializing Exynos LCD.\n");
diff --git a/src/cpu/samsung/exynos5420/cpu.c b/src/cpu/samsung/exynos5420/cpu.c
index 98bd493..a81667d 100644
--- a/src/cpu/samsung/exynos5420/cpu.c
+++ b/src/cpu/samsung/exynos5420/cpu.c
@@ -136,7 +136,7 @@
uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
- dcache_clean_invalidate_by_mva(lower, upper - lower);
+ dcache_clean_invalidate_by_mva((void *)lower, upper - lower);
mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF);
mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
