commit | b56b63503b142a0654d991bf913aabf4d5c096bd | [log] [tgz] |
---|---|---|
author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | Sat Feb 29 00:01:16 2020 -0800 |
committer | Commit Bot <commit-bot@chromium.org> | Tue Mar 03 19:15:24 2020 +0000 |
tree | 55921251d6874d6bd6ad50bdc46dfa0c3888201e | |
parent | f5fff411e1cf62be874796af695550ac1dca9954 [diff] |
UPSTREAM: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake Update FSPM header to add Vtd related Upds for Tiger Lake platform version 2457. BUG=none BRANCH=none TEST=none Change-Id: I25e80135ab0165e9875d68717a59ef990a5f9c0e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9a768be0a50a110c23373684bab50c3550813647 Original-Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Original-Change-Id: I063f921832a4e4a45eb6978b6dbb37b1ac7dde7f Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/39168 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: caveh jalali <caveh@chromium.org> Original-Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2084469 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.