| config SOC_NVIDIA_TEGRA210 |
| bool |
| default n |
| select ARCH_BOOTBLOCK_ARMV4 |
| select BOOTBLOCK_CUSTOM |
| select ARCH_VERSTAGE_ARMV4 |
| select ARCH_ROMSTAGE_ARMV4 |
| select ARCH_RAMSTAGE_ARMV8_64 |
| select ARCH_ARM64_CPU_CORTEX_A57 |
| select BOOTBLOCK_CONSOLE |
| select GIC |
| select HAVE_MONOTONIC_TIMER |
| select GENERIC_UDELAY |
| select HAVE_HARD_RESET |
| select HAVE_MTC |
| select HAVE_UART_SPECIAL |
| select HAS_PRECBMEM_TIMESTAMP_REGION |
| select CHROMEOS_RAMOOPS_NON_ACPI |
| select GENERIC_GPIO_LIB |
| select USE_BLOBS |
| |
| if SOC_NVIDIA_TEGRA210 |
| |
| # TODO: Remove after replacing arch/arm64/stage_entry.S |
| config STACK_SIZE |
| hex |
| default 0x1000 |
| |
| config MAINBOARD_DO_DSI_INIT |
| bool "Use dsi graphics interface" |
| depends on MAINBOARD_DO_NATIVE_VGA_INIT |
| default n |
| help |
| Initialize dsi display |
| |
| config MAINBOARD_DO_SOR_INIT |
| bool "Use dp graphics interface" |
| depends on MAINBOARD_DO_NATIVE_VGA_INIT |
| default n |
| help |
| Initialize dp display |
| |
| config MAX_CPUS |
| int |
| default 4 |
| |
| choice CONSOLE_SERIAL_TEGRA210_UART_CHOICES |
| prompt "Serial Console UART" |
| default CONSOLE_SERIAL_TEGRA210_UARTA |
| depends on CONSOLE_SERIAL |
| |
| config CONSOLE_SERIAL_TEGRA210_UARTA |
| bool "UARTA" |
| help |
| Serial console on UART A. |
| |
| config CONSOLE_SERIAL_TEGRA210_UARTB |
| bool "UARTB" |
| help |
| Serial console on UART B. |
| |
| config CONSOLE_SERIAL_TEGRA210_UARTC |
| bool "UARTC" |
| help |
| Serial console on UART C. |
| |
| config CONSOLE_SERIAL_TEGRA210_UARTD |
| bool "UARTD" |
| help |
| Serial console on UART D. |
| |
| config CONSOLE_SERIAL_TEGRA210_UARTE |
| bool "UARTE" |
| help |
| Serial console on UART E. |
| |
| endchoice |
| |
| config CONSOLE_SERIAL_TEGRA210_UART_ADDRESS |
| hex |
| depends on CONSOLE_SERIAL |
| default 0x70006000 if CONSOLE_SERIAL_TEGRA210_UARTA |
| default 0x70006040 if CONSOLE_SERIAL_TEGRA210_UARTB |
| default 0x70006200 if CONSOLE_SERIAL_TEGRA210_UARTC |
| default 0x70006300 if CONSOLE_SERIAL_TEGRA210_UARTD |
| default 0x70006400 if CONSOLE_SERIAL_TEGRA210_UARTE |
| help |
| Map the UART names to the respective MMIO addres. |
| |
| config BOOTROM_SDRAM_INIT |
| bool "SoC BootROM does SDRAM init with full BCT" |
| default n |
| help |
| Use during Foster LPDDR4 bringup. |
| |
| config TRUSTZONE_CARVEOUT_SIZE_MB |
| hex "Size of Trust Zone region" |
| default 0x14 |
| help |
| Size of Trust Zone area in MiB to reserve in memory map. |
| |
| config TTB_SIZE_MB |
| hex "Size of TTB" |
| default 0x4 |
| help |
| Maximum size of Translation Table Buffer in MiB. |
| |
| config SEC_COMPONENT_SIZE_MB |
| hex "Size of resident EL3 components" |
| default 0x10 |
| help |
| Maximum size of resident EL3 components in MiB including BL31 and |
| Secure OS. |
| |
| # Default to 700MHz. This value is based on nv bootloader setting. |
| config PLLX_KHZ |
| int |
| default 700000 |
| endif |
| |
| config HAVE_MTC |
| bool "Add external Memory controller Training Code binary" |
| default n |
| depends on USE_BLOBS |
| help |
| Select this option to add emc training firmware |
| |
| if HAVE_MTC |
| |
| config MTC_FILE |
| string "tegra mtc firmware filename" |
| default "tegra_mtc.bin" |
| help |
| The filename of the mtc firmware |
| |
| config MTC_DIRECTORY |
| string "Directory where MTC firmware file is located" |
| default "." |
| help |
| Path to directory where MTC firmware file is located. |
| |
| config MTC_ADDRESS |
| hex |
| default 0x81000000 |
| help |
| The DRAM location where MTC firmware to be loaded in. This location |
| needs to be consistent with the location defined in tegra_mtc.ld |
| |
| endif # HAVE_MTC |
| |
