libpayload: Add minimal support for PL011 UART
This creates a new PL011 config variable which avoids the
infinite busy wait on serial_putchar() because the register
mapping is not compatible with current implementation.
BUG=None
BRANCH=none
TEST=printf() works on the PL011 based ARMv8 foundation model
Change-Id: I9feda35a50a3488fc504d1561444161e0889deda
Signed-off-by: Marcelo Povoa <marcelogp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187020
Reviewed-by: David Hendricks <dhendrix@chromium.org>
diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in
index 112f6a1..b6b4add 100644
--- a/payloads/libpayload/Config.in
+++ b/payloads/libpayload/Config.in
@@ -168,6 +168,11 @@
default y if ARCH_X86
default n if !ARCH_X86
+config PL011_SERIAL_CONSOLE
+ bool "PL011 compatible serial port driver"
+ depends on 8250_SERIAL_CONSOLE
+ default n
+
config SERIAL_IOBASE
## This default is currently not used on non-x86 systems.
hex "Default I/O base for the serial port (default 0x3f8)"
diff --git a/payloads/libpayload/drivers/serial.c b/payloads/libpayload/drivers/serial.c
index 3daf460..6ecc5d2 100644
--- a/payloads/libpayload/drivers/serial.c
+++ b/payloads/libpayload/drivers/serial.c
@@ -63,6 +63,7 @@
{
unsigned char reg;
+#ifndef PL011_SERIAL_CONSOLE
/* Disable interrupts. */
serial_write_reg(0, 0x01);
@@ -81,6 +82,7 @@
/* Restore the previous value of the divisor.
* And set 8 bits per character */
serial_write_reg((reg & ~0x80) | 3, 0x03);
+#endif
}
#endif
@@ -136,7 +138,9 @@
{
if (!serial_hardware_is_present)
return;
+#ifndef CONFIG_LP_PL011_SERIAL_CONSOLE
while ((serial_read_reg(0x05) & 0x20) == 0) ;
+#endif
serial_write_reg(c, 0x00);
}
