exynos5420: Don't map low addresses that lead nowhere
I just spent half a day (including the time to implement a stack dumper)
to figure out that I am reading from a NULL pointer. A problem this
simple should be more easy to catch. Let's mark the address range below
SRAM as uncached so that the MMU can yell at you right away for being
the bad programmer you are when you access a NULL pointer.
BUG=None
TEST=Manual
Change-Id: I4a3a13f75bf21b25732be2ecb69d47503eff1b53
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170112
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
diff --git a/src/cpu/samsung/exynos5420/bootblock.c b/src/cpu/samsung/exynos5420/bootblock.c
index 2c42b03..97e85f1 100644
--- a/src/cpu/samsung/exynos5420/bootblock.c
+++ b/src/cpu/samsung/exynos5420/bootblock.c
@@ -24,7 +24,7 @@
#include "cpu.h"
/* convenient shorthand (in MB) */
-#define SRAM_START (0x02020000 >> 20)
+#define SRAM_START (EXYNOS5_SRAM_BASE >> 20)
#define SRAM_SIZE 1
#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
@@ -43,7 +43,7 @@
/* set up dcache and MMU */
mmu_init();
- mmu_config_range(0, SRAM_START, DCACHE_OFF);
+ mmu_disable_range(0, SRAM_START);
mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK);
mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF);
dcache_mmu_enable();
diff --git a/src/cpu/samsung/exynos5420/cpu.h b/src/cpu/samsung/exynos5420/cpu.h
index 22b12da..5b5c731 100644
--- a/src/cpu/samsung/exynos5420/cpu.h
+++ b/src/cpu/samsung/exynos5420/cpu.h
@@ -22,6 +22,8 @@
#include <arch/io.h>
+#define EXYNOS5_SRAM_BASE 0x02020000
+
/* Base address registers */
#define EXYNOS5420_GPIO_PART6_BASE 0x03860000 /* Z0 */
#define EXYNOS5_PRO_ID 0x10000000
