commit 1f1a76c8ff3b2309abc8a0cb1bec55e2ebdbb172
author Stefan Reinauer <reinauer@chromium.org> Mon Sep 09 11:12:46 2013 -0700
committer chrome-internal-fetch <chrome-internal-fetch@google.com> Tue Sep 10 18:23:21 2013 +0000
tree 38150af0f1234228057b4c120fac38485c03544c
parent cc866c20c6f936f349d2f1773dd492dca9bbf0c1

Drop non-dynamic CBMEM support from ARM mainboards

All ARM systems we support have dynamic CBMEM support.
Hence drop non-dynamic CBMEM support from the mainboard
specific code.

BUG=none
BRANCH=none
TEST=boot tested on pit

Change-Id: Icdff8dd8306ca40f86f08dee2a65f03a526b99db
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/168573
Reviewed-by: Gabe Black <gabeblack@chromium.org>

src/mainboard/google/kirby/mainboard.c

diff --git a/src/mainboard/google/kirby/mainboard.c b/src/mainboard/google/kirby/mainboard.c
index ecbfb2a..56ade8a 100644
--- a/src/mainboard/google/kirby/mainboard.c
+++ b/src/mainboard/google/kirby/mainboard.c
@@ -430,16 +430,6 @@
 {
 	dev->ops->init = &mainboard_init;
 
-#if !CONFIG_DYNAMIC_CBMEM
-	/* set up coreboot tables */
-	/* FIXME: this should happen somewhere else */
-	high_tables_size = CONFIG_COREBOOT_TABLES_SIZE;
-	high_tables_base = CONFIG_SYS_SDRAM_BASE +
-				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
-				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_init(high_tables_base, high_tables_size);
-#endif
-
 	/* set up caching for the DRAM */
 	mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
 	mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF);

src/mainboard/google/pit/mainboard.c

diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index 0835866..bdf2d57 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -453,16 +453,6 @@
 {
 	dev->ops->init = &mainboard_init;
 
-#if !CONFIG_DYNAMIC_CBMEM
-	/* set up coreboot tables */
-	/* FIXME: this should happen somewhere else */
-	high_tables_size = CONFIG_COREBOOT_TABLES_SIZE;
-	high_tables_base = CONFIG_SYS_SDRAM_BASE +
-				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
-				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_init(high_tables_base, high_tables_size);
-#endif
-
 	/* set up caching for the DRAM */
 	mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
 	mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF);

src/mainboard/google/snow/mainboard.c

diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 1a28634..756dc15 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -317,16 +317,6 @@
 {
 	dev->ops->init = &mainboard_init;
 
-#if !CONFIG_DYNAMIC_CBMEM
-	/* set up coreboot tables */
-	/* FIXME: this should happen somewhere else */
-	high_tables_size = CONFIG_COREBOOT_TABLES_SIZE;
-	high_tables_base = CONFIG_SYS_SDRAM_BASE +
-				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
-				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_init(high_tables_base, high_tables_size);
-#endif
-
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */
 	exynos5250_config_l2_cache();