firmware_Cr50ConsoleCommands: add maintainable support for guc

The guc image is not going to change much and is diverging from the
release branches. Add support for the GUC image, so we can verify it in
the future

BUG=none
TEST=run faft-cr50 with pvt, prepvt, tot, and guc image.

Change-Id: I8d16d04e0f8bf654f8d30ec587a73c99262176f9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/autotest/+/2270653
Reviewed-by: Dana Goyette <dgoyette@chromium.org>
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
diff --git a/server/site_tests/firmware_Cr50ConsoleCommands/firmware_Cr50ConsoleCommands.py b/server/site_tests/firmware_Cr50ConsoleCommands/firmware_Cr50ConsoleCommands.py
index c714689..fe0f306 100644
--- a/server/site_tests/firmware_Cr50ConsoleCommands/firmware_Cr50ConsoleCommands.py
+++ b/server/site_tests/firmware_Cr50ConsoleCommands/firmware_Cr50ConsoleCommands.py
@@ -63,6 +63,7 @@
         self.missing = []
         self.extra = []
         self.past_matches = {}
+        self._ext = ''
 
         # Make sure the console is restricted
         if self.cr50.get_cap('GscFullConsole')[self.cr50.CAP_REQ] == 'Always':
@@ -108,10 +109,13 @@
 
     def get_expected_output(self, cmd, split_str):
         """Return the expected cr50 console output"""
-        path = os.path.join(os.path.dirname(os.path.realpath(__file__)), cmd)
-        logging.info('reading %s', path)
+        file_dir = os.path.dirname(os.path.realpath(__file__))
+        path = os.path.join(file_dir, cmd + self._ext)
+        if not os.path.isfile(path):
+            path = os.path.join(file_dir, cmd)
         if not os.path.isfile(path):
             raise error.TestFail('Could not find %s file %s' % (cmd, path))
+        logging.info('reading %s', path)
 
         with open(path, 'r') as f:
             contents = f.read()
@@ -178,6 +182,7 @@
         # ends in 22.
         if version[2] == '22':
             self.include.append('guc')
+            self._ext = '.guc'
         else:
             self.exclude.append('guc')
 
diff --git a/server/site_tests/firmware_Cr50ConsoleCommands/gpiocfg.guc b/server/site_tests/firmware_Cr50ConsoleCommands/gpiocfg.guc
new file mode 100644
index 0000000..e67ef00
--- /dev/null
+++ b/server/site_tests/firmware_Cr50ConsoleCommands/gpiocfg.guc
@@ -0,0 +1,12 @@
+GPIO0_GPIO0:    read 1 drive 1
+GPIO0_GPIO1:    read 0 drive 0
+GPIO0_GPIO2:    read 0 drive 0
+(?P<ccd_enabled>GPIO0_GPIO5:    read 0 drive 0)?
+(?P<closed_source_set1>GPIO0_GPIO11:   read 1 drive 1)?
+(?P<closed_source_set1>GPIO0_GPIO12:   read 0 drive 0)?
+GPIO1_GPIO0:    read 1 INT_RISING
+(?P<ccd_enabled_without_servo_block>GPIO1_GPIO3: read 0 INT_HIGH)?
+GPIO1_GPIO4:    read 1 INT_FALLING
+GPIO1_GPIO5:    read 0 drive 1
+(?P<ec_comm>GPIO1_GPIO7: read 0 INT_RISING)?
+(?P<ec_comm>GPIO1_GPIO8: read 0 INT_FALLING)?
diff --git a/server/site_tests/firmware_Cr50ConsoleCommands/help.guc b/server/site_tests/firmware_Cr50ConsoleCommands/help.guc
new file mode 100644
index 0000000..39f9d98
--- /dev/null
+++ b/server/site_tests/firmware_Cr50ConsoleCommands/help.guc
@@ -0,0 +1,40 @@
+bid
+-bitbang
+bpforce
+brdprop
+ccd
+-ccdblock
+ccdstate
+chan
+dump_nvmem
+ecrst
+(?P<guc>eraseflashinfo)?
+gettime
+gpiocfg
+gpioget
+-gpioset
+help
+history
+-i2cscan
+i2cstpm
+-i2cxfer
+idle
+-panicinfo
+pinmux
+-powerbtn
+-rddkeepalive
+-reboot
+recbtnforce
+rma_auth
+-serialno
+shmem
+sleepmask
+sn
+(?P<mp>-)?spihash
+sysinfo
+sysrst
+taskinfo
+timerinfo
+-usb
+version
+wp
diff --git a/server/site_tests/firmware_Cr50ConsoleCommands/pinmux.guc b/server/site_tests/firmware_Cr50ConsoleCommands/pinmux.guc
new file mode 100644
index 0000000..3b3d027
--- /dev/null
+++ b/server/site_tests/firmware_Cr50ConsoleCommands/pinmux.guc
@@ -0,0 +1,67 @@
+40060000: DIOM0    5  IN (?P<plt_rst>GPIO0_GPIO4)?(?P<sys_rst>PU  GPIO0_GPIO4  WAKE_LOW)?
+40060008: DIOM1    6  IN PU GPIO0_GPIO5
+40060010: DIOM2    0  IN
+(?P<plt_rst>40060018: DIOM3    0  IN  WAKE_LOW)?
+40060028: DIOA0   70   UART0_TX
+(?P<sps_ds_resume>40060030: DIOA1    0  IN)?
+(?P<rec_lid_a1>40060030: DIOA1 27 IN GPIO1_GPIO10)?
+(?P<i2cs>40060030: DIOA1   38  IN I2CS0_SDA WAKE_FALLING)?
+(?P<sps>40060038: DIOA2    0  IN)?
+40060040: DIOA3    0  IN
+40060048: DIOA4    8  IN PD  GPIO0_GPIO7
+40060050: DIOA5    1  IN  GPIO0_GPIO0
+(?P<sps>40060058: DIOA6    0  IN)?
+(?P<ccd_without_servo_block>40060060: DIOA7 74 UART1_TX)?
+40060068: DIOA8    9  IN PD  GPIO0_GPIO8
+(?P<i2cs>40060070: DIOA9   37  IN I2CS0_SCL WAKE_FALLING)?
+(?P<rec_lid_a9>40060070: DIOA9 27 IN GPIO1_GPIO10)?
+40060080: DIOA11   0  IN
+(?P<sps>40060088: DIOA12   0  IN  WAKE_FALLING)?
+(?P<rec_lid_a12>40060088: DIOA12 27 IN GPIO1_GPIO10)?
+40060090: DIOA13   0  IN  WAKE_LOW
+40060098: DIOA14  10  IN  GPIO0_GPIO9
+400600a0: DIOB0   (?P<open_source_set>0 IN)?(?P<closed_source_set1>13 IN GPIO0_GPIO12)?
+400600a8: DIOB1   (?P<open_source_set>0 IN)?(?P<closed_source_set1>14 IN GPIO0_GPIO13)?
+400600b0: DIOB2    2  IN  GPIO0_GPIO1
+400600b8: DIOB3    (?P<no_ec_comm>3 IN GPIO0_GPIO2)?(?P<ec_comm>0 IN)?
+400600c0: DIOB4    (?P<no_ec_comm>0 IN PD)?(?P<ec_comm>3 IN PD GPIO0_GPIO2)?
+400600c8: DIOB5    0  IN PD
+400600d0: DIOB6   16  IN  GPIO0_GPIO15
+400600d8: DIOB7   12  IN  GPIO0_GPIO11
+
+400600f8: GPIO0_GPIO0   20  DIOA5
+400600fc: GPIO0_GPIO1    8  DIOB2
+40060100: GPIO0_GPIO2   (?P<no_ec_comm>7 DIOB3)?(?P<ec_comm>6 DIOB4)?
+40060108: GPIO0_GPIO4   30  DIOM0
+4006010c: GPIO0_GPIO5   29  DIOM1
+40060110: GPIO0_GPIO6   28  DIOM2
+40060114: GPIO0_GPIO7   21  DIOA4
+40060118: GPIO0_GPIO8   17  DIOA8
+4006011c: GPIO0_GPIO9   11  DIOA14
+40060120: GPIO0_GPIO10   6  DIOB4
+40060124: GPIO0_GPIO11   3  DIOB7
+40060128: GPIO0_GPIO12  10  DIOB0
+4006012c: GPIO0_GPIO13   9  DIOB1
+(?P<i2cs>40060130: GPIO0_GPIO14  24  DIOA1)?
+40060134: GPIO0_GPIO15   4  DIOB6
+40060138: GPIO1_GPIO0   (?P<plt_rst>27  DIOM3)?(?P<sys_rst>30  DIOM0)?
+4006013c: GPIO1_GPIO1   22  DIOA3
+40060140: GPIO1_GPIO2    4  DIOB6
+40060144: GPIO1_GPIO3    5  DIOB5
+40060148: GPIO1_GPIO4   (?P<plt_rst>27  DIOM3)?(?P<sys_rst>30  DIOM0)?
+40060150: GPIO1_GPIO6   24  DIOA1
+(?P<ec_comm>40060154: GPIO1_GPIO7 7 DIOB3)?
+(?P<ec_comm>40060158: GPIO1_GPIO8 7 DIOB3)?
+(?P<rec_lid_a1>40060160: GPIO1_GPIO10 24 DIOA1)?
+(?P<rec_lid_a9>40060160: GPIO1_GPIO10 16 DIOA9)?
+(?P<rec_lid_a12>40060160: GPIO1_GPIO10 13 DIOA12)?
+40060164: GPIO1_GPIO11   4  DIOB6
+40060168: GPIO1_GPIO12  24  DIOA1
+4006016c: GPIO1_GPIO13  16  DIOA9
+40060170: GPIO1_GPIO14  19  DIOA6
+40060174: GPIO1_GPIO15  13  DIOA12
+(?P<i2cs>40060188: I2CS0_SCL    16  DIOA9)?
+(?P<i2cs>4006018c: I2CS0_SDA    24  DIOA1)?
+40060208: UART0_RX      12  DIOA13
+40060218: UART1_RX      22  DIOA3
+40060228: UART2_RX       4  DIOB6