commit 31912b61a7c19515f5f5decae8ccad7b8e42f4cf
author Aaron Durbin <adurbin@chromium.org> Tue Dec 10 14:58:03 2013 -0800
committer chrome-internal-fetch <chrome-internal-fetch@google.com> Wed Dec 11 19:50:35 2013 +0000
tree c7710da57badca64fb949e28360ae23c08cf219f
parent a7e2c765191f151bed7e3266d1491cab0c34bae3

crossystem: add GpioChipset sturcture for x86

Up until recently the x86 systems had a single contiguous
set of gpio numbers exported through /sys/class/gpio
as /sys/class/gpiochip<X> values. BayTrail systems have
3 sets of gpio numbers. Therefore, there needs to be a
translation/look-up function based on chipset. The existing
chipsets have a 1:1 mapping, but this patch lays the ground-
work for chipset-specific translation.

BUG=chrome-os-partner:24324
BUG=chrome-os-partner:24440
BUG=chrome-os-partner:24408
BRANCH=None
TEST=Built. Ran on Rambi.

Change-Id: I32bcd975aea421f86a0220ee30332f48fe727656
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179512
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

host/arch/x86/lib/crossystem_arch.c

diff --git a/host/arch/x86/lib/crossystem_arch.c b/host/arch/x86/lib/crossystem_arch.c
index bc899a2..922dc64 100644
--- a/host/arch/x86/lib/crossystem_arch.c
+++ b/host/arch/x86/lib/crossystem_arch.c
@@ -499,7 +499,7 @@
  * we look for a directory named /sys/class/gpio/gpiochip<O>/. If there's not
  * exactly one match for that, we're SOL.
  */
-static int FindGpioChipOffset(int *offset) {
+static int FindGpioChipOffset(int *gpio_num, int *offset) {
   DIR *dir;
   struct dirent *ent;
   int match = 0;
@@ -520,6 +520,30 @@
 }
 
 
+struct GpioChipset {
+  const char *name;
+  int (*ChipOffsetAndGpioNumber)(int *gpio_num, int *chip_offset);
+};
+
+static const struct GpioChipset chipsets_supported[] = {
+  { "NM10", FindGpioChipOffset },
+  { "CougarPoint", FindGpioChipOffset },
+  { "PantherPoint", FindGpioChipOffset },
+  { "LynxPoint", FindGpioChipOffset },
+  { NULL },
+};
+
+static const struct GpioChipset *FindChipset(const char *name) {
+  const struct GpioChipset *chipset = &chipsets_supported[0];
+
+  while (chipset->name != NULL) {
+    if (!strcmp(name, chipset->name))
+      return chipset;
+    chipset++;
+  }
+  return NULL;
+}
+
 /* Read a GPIO of the specified signal type (see ACPI GPIO SignalType).
  *
  * Returns 1 if the signal is asserted, 0 if not asserted, or -1 if error. */
@@ -532,6 +556,7 @@
   int controller_offset = 0;
   char controller_name[128];
   int value;
+  const struct GpioChipset *chipset;
 
   /* Scan GPIO.* to find a matching signal type */
   for (index = 0; ; index++) {
@@ -555,14 +580,12 @@
   snprintf(name, sizeof(name), "%s.%d/GPIO.3", ACPI_GPIO_PATH, index);
   if (!ReadFileString(controller_name, sizeof(controller_name), name))
     return -1;
-  if ((0 != strcmp(controller_name, "NM10")) &&
-      (0 != strcmp(controller_name, "CougarPoint")) &&
-      (0 != strcmp(controller_name, "PantherPoint")) &&
-      (0 != strcmp(controller_name, "LynxPoint")))
+  chipset = FindChipset(controller_name);
+  if (chipset == NULL)
     return -1;
 
   /* Modify GPIO number by driver's offset */
-  if (!FindGpioChipOffset(&controller_offset))
+  if (!chipset->ChipOffsetAndGpioNumber(&controller_num, &controller_offset))
     return -1;
   controller_offset += controller_num;