contrib/power_measurement/pacman/guybrush_r0_pacs_minismt.py

# Copyright 2021 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.

# These devices are pac19next (4-channels/i2c address) devices
inas = [
    #    drvname,   slv,       name,			nom,   sense,mux,  is_calib
    ('pac19next','0x10:0','PPVAR_VDDCR',0.000,0.001,'rem',True),
    ('pac19next','0x10:1','PPVAR_PCORE_SOC_IN',0.000,0.001,'rem',True),
    ('pac19next','0x10:2','PPVAR_VDDCR_SOC_S0',1.000,0.001,'rem',True),
    ('pac19next','0x10:3','PPVAR_VDDCR_S0_PH3',1.000,0.001,'rem',True),
    ('pac19next','0x11:0','PPVAR_VDDCR_S0_PH2',1.000,0.001,'rem',True),
    ('pac19next','0x11:1','PP3300_VDDBT_RTC',3.300,1000.000,'rem',True),
    ('pac19next','0x11:2','PPVAR_VDDCR_S0_PH1',1.000,0.001,'rem',True),
    ('pac19next','0x12:0','PP3300_S0_VDD_33_S5',3.300,0.200,'rem',True),
    ('pac19next','0x12:1','PP3300_S0_VDD_33',3.300,0.200,'rem',True),
    ('pac19next','0x12:2','PP1800_S5_VDD_18_S5',1.800,0.050,'rem',True),
    ('pac19next','0x12:3','PP1800_S0_VDD_18',1.800,0.020,'rem',True),
    ('pac19next','0x13:0','PP1800_S0_VDDIO_VPH',1.800,0.050,'rem',True),
    ('pac19next','0x13:1','PP1800_S5_VDDIO_AUDIO',1.800,0.220,'rem',
     True),
    ('pac19next','0x13:2','PP0750_VDDP_S5',0.750,0.020,'rem',True),
    ('pac19next','0x13:3','PP0750_VDDP_S0',0.750,0.020,'rem',True),
    ('pac19next','0x14:0','PP1100_SOC_MEM_S3',1.100,0.005,'rem',True),
    ('pac19next','0x14:1','PP1100_MEM_S3',1.100,0.003,'rem',True),
    ('pac19next','0x14:2','PP1800_MEM_S3',1.800,0.500,'rem',True),
    ('pac19next','0x14:3','PP0600_MEM',0.600,0.03,'rem',True),
    ('pac19next','0x15:0','PP3300_EC_Z1',3.300,0.220,'rem',True),
    ('pac19next','0x15:1','PP1800_Z1',1.800,0.010,'rem',True),
    ('pac19next','0x15:2','PP3300_Z1',3.300,0.005,'rem',True),
    ('pac19next','0x15:3','PP3300_S0',3.300,0.010,'rem',True),
    ('pac19next','0x16:0','PP3300_GSC_Z1',3.300,0.300,'rem',True),
    ('pac19next','0x16:1','PP1800_GSC_Z1',1.800,1.000,'rem',True),
    ('pac19next','0x16:2','PP5000_S5',5.000,0.005,'rem',True),
    ('pac19next','0x16:3','PPVAR_SYS_KB_BL',0.000,0.050,'rem',True),
    ('pac19next','0x17:0','PP3300_DISP_X',3.300,0.020,'rem',True),
    ('pac19next','0x17:1','PPVAR_BL_PWR',0.000,0.100,'rem',True),
    ('pac19next','0x17:2','PP3300_WWAN_X',3.300,0.015,'rem',True),
    ('pac19next','0x17:3','PP3300_WLAN_X',3.300,0.030,'rem',True),
    ('pac19next','0x18:0','PP1800_S0',1.800,0.010,'rem',True),
    ('pac19next','0x18:1','PP1800_EC_Z1',1.800,1.000,'rem',True),
    ('pac19next','0x18:2','PP3300_S5',3.300,0.100,'rem',True),
    ('pac19next','0x18:3','PP1800_S5',1.800,0.030,'rem',True),
    ('pac19next','0x19:0','PP3300_SD_S0',3.300,0.020,'rem',True),
    ('pac19next','0x19:1','PP3300_SSD_S0',3.300,0.020,'rem',True),
    ('pac19next','0x19:2','PP3300_Z5',3.300,0.500,'rem',True),
    ('pac19next','0x19:3','PPVAR_SYS_DB',0.000,0.010,'rem',True),
    ('pac19next','0x1A:0','PPVAR_SYS',0.000,0.02,'rem',True),
    ('pac19next','0x1A:1','PPVAR_BAT_Q',0.000,0.005,'rem',True),
    ('pac19next','0x1A:2','PPVAR_VBUS_IN',0.000,0.001,'rem',True),
    ('pac19next','0x1B:0','PP5000_S5_DB',5.000,0.005,'rem',True),
    ('pac19next','0x1B:1','PP3300_S5_DB',3.300,0.500,'rem',True),
    ('pac19next','0x1B:2','PP1200_S5_DB',1.200,0.050,'rem',True),
]