| fix from upstream |
| |
| From e67c67321ce240c93dd0fa2b21c649c0a8e233f7 Mon Sep 17 00:00:00 2001 |
| From: Jussi Kivilinna <jussi.kivilinna@iki.fi> |
| Date: Tue, 22 Oct 2013 17:07:53 +0300 |
| Subject: [PATCH] mpi: allow building with clang on ARM |
| |
| * mpi/longlong.h [__arm__] (add_ssaaaa, sub_ddmmss, umul_ppmm) |
| (count_leading_zeros): Do not cast assembly output arguments. |
| [__arm__] (umul_ppmm): Remove the extra '%' ahead of assembly comment. |
| [_ARM_ARCH >= 4] (umul_ppmm): Use correct inputs and outputs instead of |
| registers. |
| -- |
| |
| Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> |
| --- |
| mpi/longlong.h | 27 +++++++++++++-------------- |
| 1 file changed, 13 insertions(+), 14 deletions(-) |
| |
| diff --git a/mpi/longlong.h b/mpi/longlong.h |
| index c2ab9c5..8c8260e 100644 |
| --- a/mpi/longlong.h |
| +++ b/mpi/longlong.h |
| @@ -188,8 +188,8 @@ extern UDItype __udiv_qrnnd (); |
| #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
| __asm__ ("adds %1, %4, %5\n" \ |
| "adc %0, %2, %3" \ |
| - : "=r" ((USItype)(sh)), \ |
| - "=&r" ((USItype)(sl)) \ |
| + : "=r" ((sh)), \ |
| + "=&r" ((sl)) \ |
| : "%r" ((USItype)(ah)), \ |
| "rI" ((USItype)(bh)), \ |
| "%r" ((USItype)(al)), \ |
| @@ -197,15 +197,15 @@ extern UDItype __udiv_qrnnd (); |
| #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
| __asm__ ("subs %1, %4, %5\n" \ |
| "sbc %0, %2, %3" \ |
| - : "=r" ((USItype)(sh)), \ |
| - "=&r" ((USItype)(sl)) \ |
| + : "=r" ((sh)), \ |
| + "=&r" ((sl)) \ |
| : "r" ((USItype)(ah)), \ |
| "rI" ((USItype)(bh)), \ |
| "r" ((USItype)(al)), \ |
| "rI" ((USItype)(bl))) |
| #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__ |
| #define umul_ppmm(xh, xl, a, b) \ |
| - __asm__ ("%@ Inlined umul_ppmm\n" \ |
| + __asm__ ("@ Inlined umul_ppmm\n" \ |
| "mov %|r0, %2, lsr #16 @ AAAA\n" \ |
| "mov %|r2, %3, lsr #16 @ BBBB\n" \ |
| "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \ |
| @@ -218,20 +218,19 @@ extern UDItype __udiv_qrnnd (); |
| "addcs %|r2, %|r2, #65536\n" \ |
| "adds %1, %|r1, %|r0, lsl #16\n" \ |
| "adc %0, %|r2, %|r0, lsr #16" \ |
| - : "=&r" ((USItype)(xh)), \ |
| - "=r" ((USItype)(xl)) \ |
| + : "=&r" ((xh)), \ |
| + "=r" ((xl)) \ |
| : "r" ((USItype)(a)), \ |
| "r" ((USItype)(b)) \ |
| : "r0", "r1", "r2") |
| #else |
| #define umul_ppmm(xh, xl, a, b) \ |
| - __asm__ ("%@ Inlined umul_ppmm\n" \ |
| - "umull %r1, %r0, %r2, %r3" \ |
| - : "=&r" ((USItype)(xh)), \ |
| - "=r" ((USItype)(xl)) \ |
| + __asm__ ("@ Inlined umul_ppmm\n" \ |
| + "umull %1, %0, %2, %3" \ |
| + : "=&r" ((xh)), \ |
| + "=r" ((xl)) \ |
| : "r" ((USItype)(a)), \ |
| - "r" ((USItype)(b)) \ |
| - : "r0", "r1") |
| + "r" ((USItype)(b))) |
| #endif |
| #define UMUL_TIME 20 |
| #define UDIV_TIME 100 |
| -- |
| 2.4.4 |
| |
