powertop: upgraded package to upstream
Upgraded sys-power/powertop to version 2.7-r2 on amd64
This adds support for BSW and SKL, and support for more BDW SKUs.
BUG=None
TEST=glados: powertop runs, no regressions in normal usage
TEST=strago: powertop runs, no regressions in normal usage
TEST=amd64-generic, x86-generic: runs, no regressions in normal usage
TEST=arm: builds
Change-Id: Ibfaf637efcf12f52f529b6d751b36a32a85a2db6
Signed-off-by: Joe Konno <joe.konno@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/284396
Tested-by: Philip Hanson <philip.hanson@intel.com>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
diff --git a/metadata/md5-cache/sys-power/powertop-2.7-r1 b/metadata/md5-cache/sys-power/powertop-2.7-r2
similarity index 94%
rename from metadata/md5-cache/sys-power/powertop-2.7-r1
rename to metadata/md5-cache/sys-power/powertop-2.7-r2
index a476ca4..117a168 100644
--- a/metadata/md5-cache/sys-power/powertop-2.7-r1
+++ b/metadata/md5-cache/sys-power/powertop-2.7-r2
@@ -10,4 +10,4 @@
SLOT=0
SRC_URI=https://01.org/sites/default/files/downloads/powertop/powertop-2.7.tar.gz
_eclasses_=eutils 06133990e861be0fe60c2b428fd025d9 linux-info a238cd46144175b5f6538caa13bdf180 multilib 3bf24e6abb9b76d9f6c20600f0b716bf toolchain-funcs 48b38a216afb92db6314d6c3187abea3 versionator 865bc8b2fc9fcfb6d520bdf5a110f5ed
-_md5_=01b8224173e047b286cb244461d170d0
+_md5_=ad0daa5dea99a3071193f84e5976a851
diff --git a/sys-power/powertop/files/powertop-2.7-braswell.patch b/sys-power/powertop/files/powertop-2.7-braswell.patch
new file mode 100644
index 0000000..cabbed4
--- /dev/null
+++ b/sys-power/powertop/files/powertop-2.7-braswell.patch
@@ -0,0 +1,81 @@
+From 1c60f2342b752149f3d6543c63fee11a167dc998 Mon Sep 17 00:00:00 2001
+From: "David E. Box" <david.e.box@linux.intel.com>
+Date: Thu, 2 Apr 2015 21:24:29 -0700
+Subject: [PATCH] Fix Powertop support for Intel Braswell SOC
+
+Correct Braswell MSR used to determine PC6 residency.
+
+Signed-off-by: David E. Box <david.e.box@linux.intel.com>
+---
+ src/cpu/intel_cpus.cpp | 21 +++++++++++++++++++--
+ src/cpu/intel_cpus.h | 1 +
+ 2 files changed, 20 insertions(+), 2 deletions(-)
+
+diff --git a/src/cpu/intel_cpus.cpp b/src/cpu/intel_cpus.cpp
+index d96cb49..1f3647a 100644
+--- a/src/cpu/intel_cpus.cpp
++++ b/src/cpu/intel_cpus.cpp
+@@ -289,6 +289,7 @@ nhm_package::nhm_package(int model)
+ has_c8c9c10_res = 0;
+ has_c2c6_res = 0;
+ has_c7_res = 0;
++ has_c6c_res = 0;
+
+ switch(model) {
+ case 0x2A: /* SNB */
+@@ -314,6 +315,9 @@ nhm_package::nhm_package(int model)
+ else
+ has_c7_res = 0;
+ }
++ /* BSW only exposes package C6 */
++ else if (model == 0x4C)
++ has_c6c_res = 1;
+ else
+ has_c3_res = 1;
+
+@@ -360,7 +364,15 @@ void nhm_package::measurement_start(void)
+
+ if (this->has_c3_res)
+ c3_before = get_msr(number, MSR_PKG_C3_RESIDENCY);
+- c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY);
++
++ /*
++ * Hack for Braswell where C7 MSR is actually BSW C6
++ */
++ if (this->has_c6c_res)
++ c6_before = get_msr(number, MSR_PKG_C7_RESIDENCY);
++ else
++ c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY);
++
+ if (this->has_c7_res)
+ c7_before = get_msr(number, MSR_PKG_C7_RESIDENCY);
+ if (this->has_c8c9c10_res) {
+@@ -401,7 +413,12 @@ void nhm_package::measurement_end(void)
+
+ if (this->has_c3_res)
+ c3_after = get_msr(number, MSR_PKG_C3_RESIDENCY);
+- c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY);
++
++ if (this->has_c6c_res)
++ c6_after = get_msr(number, MSR_PKG_C7_RESIDENCY);
++ else
++ c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY);
++
+ if (this->has_c7_res)
+ c7_after = get_msr(number, MSR_PKG_C7_RESIDENCY);
+ if (has_c8c9c10_res) {
+diff --git a/src/cpu/intel_cpus.h b/src/cpu/intel_cpus.h
+index 810a243..0331069 100644
+--- a/src/cpu/intel_cpus.h
++++ b/src/cpu/intel_cpus.h
+@@ -77,6 +77,7 @@ public:
+ int has_c7_res;
+ int has_c2c6_res;
+ int has_c3_res;
++ int has_c6c_res; /* BSW */
+ int has_c8c9c10_res;
+ nhm_package(int model);
+ virtual void measurement_start(void);
+--
+2.4.4
+
diff --git a/sys-power/powertop/files/powertop-2.7-broadwell.patch b/sys-power/powertop/files/powertop-2.7-broadwell.patch
new file mode 100644
index 0000000..7a1ed6f
--- /dev/null
+++ b/sys-power/powertop/files/powertop-2.7-broadwell.patch
@@ -0,0 +1,28 @@
+From 60258e6149a420b45521201e02f39cf41839e081 Mon Sep 17 00:00:00 2001
+From: Alexandra Yates <alexandra.yates@linux.intel.com>
+Date: Wed, 22 Oct 2014 06:57:10 -0700
+Subject: [PATCH] Enable PowerTOP support for: BSW, BDW-H
+
+Added PowerTOP support for BSW and BDW-H platforms.
+
+Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
+---
+ src/cpu/intel_cpus.cpp | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/src/cpu/intel_cpus.cpp b/src/cpu/intel_cpus.cpp
+index 167f1a7..d307aa1 100644
+--- a/src/cpu/intel_cpus.cpp
++++ b/src/cpu/intel_cpus.cpp
+@@ -59,6 +59,8 @@ static int intel_cpu_models[] = {
+ 0x3D, /* Intel Next Generation */
+ 0x3F, /* HSX */
+ 0x46, /* HSW */
++ 0x47, /* BDW-H */
++ 0x4C, /* BSW */
+ 0x4D, /* AVN */
+ 0x4F, /* BDX */
+ 0x56, /* BDX-DE */
+--
+2.4.4
+
diff --git a/sys-power/powertop/files/powertop-2.7-skylake-2.patch b/sys-power/powertop/files/powertop-2.7-skylake-2.patch
new file mode 100644
index 0000000..be5f0a3
--- /dev/null
+++ b/sys-power/powertop/files/powertop-2.7-skylake-2.patch
@@ -0,0 +1,37 @@
+From a7ddbd00f84253da38acc393e38f1c4db4263864 Mon Sep 17 00:00:00 2001
+From: Alexandra Yates <alexandra.yates@linux.intel.com>
+Date: Thu, 16 Apr 2015 14:36:29 -0700
+Subject: [PATCH] Add C7- C10 support for Intel SKY
+
+Add C7 to C10 support for Intel SKY for CPU idle.
+
+Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
+---
+ src/cpu/intel_cpus.cpp | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/cpu/intel_cpus.cpp b/src/cpu/intel_cpus.cpp
+index 72ecd50..d96cb49 100644
+--- a/src/cpu/intel_cpus.cpp
++++ b/src/cpu/intel_cpus.cpp
+@@ -63,7 +63,7 @@ static int intel_cpu_models[] = {
+ 0x4C, /* BSW */
+ 0x4D, /* AVN */
+ 0x4F, /* BDX */
+- 0x4E, /* Intel Next Generation */
++ 0x4E, /* SKY */
+ 0x56, /* BDX-DE */
+ 0 /* last entry must be zero */
+ };
+@@ -318,7 +318,7 @@ nhm_package::nhm_package(int model)
+ has_c3_res = 1;
+
+ /* Haswell-ULT has C8/9/10*/
+- if (model == 0x45 || model ==0x3D)
++ if (model == 0x45 || model == 0x3D || model == 0x4E)
+ has_c8c9c10_res = 1;
+ }
+
+--
+2.4.4
+
diff --git a/sys-power/powertop/files/powertop-2.7-skylake.patch b/sys-power/powertop/files/powertop-2.7-skylake.patch
new file mode 100644
index 0000000..50781dd
--- /dev/null
+++ b/sys-power/powertop/files/powertop-2.7-skylake.patch
@@ -0,0 +1,58 @@
+From 761e87f1ccd3b5364b5518d7e29f4b7b8a6b8490 Mon Sep 17 00:00:00 2001
+From: Alexandra Yates <alexandra.yates@linux.intel.com>
+Date: Wed, 21 Jan 2015 16:55:59 -0800
+Subject: [PATCH] Adding support to SKY platforms.
+
+Adding Intel SKY platform support to PowerTOP
+
+Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
+---
+ src/cpu/intel_cpus.cpp | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+diff --git a/src/cpu/intel_cpus.cpp b/src/cpu/intel_cpus.cpp
+index d307aa1..04275e5 100644
+--- a/src/cpu/intel_cpus.cpp
++++ b/src/cpu/intel_cpus.cpp
+@@ -51,18 +51,19 @@ static int intel_cpu_models[] = {
+ 0x2C, /* Westmere */
+ 0x2A, /* SNB */
+ 0x2D, /* SNB Xeon */
++ 0x37, /* BYT-M */
+ 0x3A, /* IVB */
+ 0x3C,
++ 0x3D, /* Broadwell */
+ 0x3E, /* IVB Xeon */
+- 0x37, /* BYT-M */
+- 0x45, /* HSW-ULT */
+- 0x3D, /* Intel Next Generation */
+ 0x3F, /* HSX */
++ 0x45, /* HSW-ULT */
+ 0x46, /* HSW */
+ 0x47, /* BDW-H */
+ 0x4C, /* BSW */
+ 0x4D, /* AVN */
+ 0x4F, /* BDX */
++ 0x4E, /* Intel Next Generation */
+ 0x56, /* BDX-DE */
+ 0 /* last entry must be zero */
+ };
+@@ -125,6 +126,7 @@ nhm_core::nhm_core(int model)
+ case 0x3C:
+ case 0x3E: /* IVB Xeon */
+ case 0x45: /* HSW-ULT */
++ case 0x4E: /* SKY */
+ case 0x3D: /* Intel Next Generation */
+ has_c7_res = 1;
+ }
+@@ -300,6 +302,7 @@ nhm_package::nhm_package(int model)
+ case 0x3C:
+ case 0x3E: /* IVB Xeon */
+ case 0x45: /* HSW-ULT */
++ case 0x4E: /* SKY */
+ case 0x3D: /* Intel Next Generation */
+ has_c2c6_res=1;
+ has_c7_res = 1;
+--
+2.4.4
+
diff --git a/sys-power/powertop/powertop-2.7-r1.ebuild b/sys-power/powertop/powertop-2.7-r2.ebuild
similarity index 93%
rename from sys-power/powertop/powertop-2.7-r1.ebuild
rename to sys-power/powertop/powertop-2.7-r2.ebuild
index e76ec95..0473856 100644
--- a/sys-power/powertop/powertop-2.7-r1.ebuild
+++ b/sys-power/powertop/powertop-2.7-r2.ebuild
@@ -1,6 +1,6 @@
# Copyright 1999-2015 Gentoo Foundation
# Distributed under the terms of the GNU General Public License v2
-# $Header: /var/cvsroot/gentoo-x86/sys-power/powertop/powertop-2.7-r1.ebuild,v 1.2 2015/03/02 22:25:47 vapier Exp $
+# $Header: /var/cvsroot/gentoo-x86/sys-power/powertop/powertop-2.7-r2.ebuild,v 1.1 2015/07/08 11:53:58 vapier Exp $
EAPI="5"
@@ -89,6 +89,10 @@
src_prepare() {
epatch "${FILESDIR}"/${P}-baytrail-msr.patch
+ epatch "${FILESDIR}"/${P}-broadwell.patch
+ epatch "${FILESDIR}"/${P}-braswell.patch
+ epatch "${FILESDIR}"/${P}-skylake.patch
+ epatch "${FILESDIR}"/${P}-skylake-2.patch
}
src_configure() {
