| From 4c31d1181bf474c37dfea5500dd69db897e02996 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com> |
| Date: Tue, 10 Dec 2019 12:04:54 -0800 |
| Subject: [PATCH] intel: sync i915_pciids.h with kernel |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| Changes: |
| 651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids") |
| b6a8781a447c ("drm/i915/cml: Remove unsupport PCI ID") |
| 8717c6b7414f ("drm/i915/cml: Separate U series pci id from origianl list.") |
| |
| v2: added the latest CML changes |
| |
| Cc: James Ausmus <james.ausmus@intel.com> |
| Cc: Matt Roper <matthew.d.roper@intel.com> |
| Cc: Lucas De Marchi <lucas.demarchi@intel.com> |
| Reviewed-by: Matt Roper <matthew.d.roper@intel.com> |
| Signed-off-by: José Roberto de Souza <jose.souza@intel.com> |
| Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> |
| --- |
| intel/i915_pciids.h | 31 ++++++++++++++++++------------- |
| 1 file changed, 18 insertions(+), 13 deletions(-) |
| |
| diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h |
| index b1f66b117c74..1d2c12219f44 100644 |
| --- a/intel/i915_pciids.h |
| +++ b/intel/i915_pciids.h |
| @@ -446,23 +446,18 @@ |
| |
| /* CML GT1 */ |
| #define INTEL_CML_GT1_IDS(info) \ |
| - INTEL_VGA_DEVICE(0x9B21, info), \ |
| - INTEL_VGA_DEVICE(0x9BAA, info), \ |
| - INTEL_VGA_DEVICE(0x9BAB, info), \ |
| - INTEL_VGA_DEVICE(0x9BAC, info), \ |
| - INTEL_VGA_DEVICE(0x9BA0, info), \ |
| INTEL_VGA_DEVICE(0x9BA5, info), \ |
| INTEL_VGA_DEVICE(0x9BA8, info), \ |
| INTEL_VGA_DEVICE(0x9BA4, info), \ |
| INTEL_VGA_DEVICE(0x9BA2, info) |
| |
| +#define INTEL_CML_U_GT1_IDS(info) \ |
| + INTEL_VGA_DEVICE(0x9B21, info), \ |
| + INTEL_VGA_DEVICE(0x9BAA, info), \ |
| + INTEL_VGA_DEVICE(0x9BAC, info) |
| + |
| /* CML GT2 */ |
| #define INTEL_CML_GT2_IDS(info) \ |
| - INTEL_VGA_DEVICE(0x9B41, info), \ |
| - INTEL_VGA_DEVICE(0x9BCA, info), \ |
| - INTEL_VGA_DEVICE(0x9BCB, info), \ |
| - INTEL_VGA_DEVICE(0x9BCC, info), \ |
| - INTEL_VGA_DEVICE(0x9BC0, info), \ |
| INTEL_VGA_DEVICE(0x9BC5, info), \ |
| INTEL_VGA_DEVICE(0x9BC8, info), \ |
| INTEL_VGA_DEVICE(0x9BC4, info), \ |
| @@ -471,6 +466,11 @@ |
| INTEL_VGA_DEVICE(0x9BE6, info), \ |
| INTEL_VGA_DEVICE(0x9BF6, info) |
| |
| +#define INTEL_CML_U_GT2_IDS(info) \ |
| + INTEL_VGA_DEVICE(0x9B41, info), \ |
| + INTEL_VGA_DEVICE(0x9BCA, info), \ |
| + INTEL_VGA_DEVICE(0x9BCC, info) |
| + |
| #define INTEL_KBL_IDS(info) \ |
| INTEL_KBL_GT1_IDS(info), \ |
| INTEL_KBL_GT2_IDS(info), \ |
| @@ -536,7 +536,9 @@ |
| INTEL_WHL_U_GT3_IDS(info), \ |
| INTEL_AML_CFL_GT2_IDS(info), \ |
| INTEL_CML_GT1_IDS(info), \ |
| - INTEL_CML_GT2_IDS(info) |
| + INTEL_CML_GT2_IDS(info), \ |
| + INTEL_CML_U_GT1_IDS(info), \ |
| + INTEL_CML_U_GT2_IDS(info) |
| |
| /* CNL */ |
| #define INTEL_CNL_PORT_F_IDS(info) \ |
| @@ -579,12 +581,15 @@ |
| INTEL_VGA_DEVICE(0x8A51, info), \ |
| INTEL_VGA_DEVICE(0x8A5D, info) |
| |
| -/* EHL */ |
| +/* EHL/JSL */ |
| #define INTEL_EHL_IDS(info) \ |
| INTEL_VGA_DEVICE(0x4500, info), \ |
| INTEL_VGA_DEVICE(0x4571, info), \ |
| INTEL_VGA_DEVICE(0x4551, info), \ |
| - INTEL_VGA_DEVICE(0x4541, info) |
| + INTEL_VGA_DEVICE(0x4541, info), \ |
| + INTEL_VGA_DEVICE(0x4E71, info), \ |
| + INTEL_VGA_DEVICE(0x4E61, info), \ |
| + INTEL_VGA_DEVICE(0x4E51, info) |
| |
| /* TGL */ |
| #define INTEL_TGL_12_IDS(info) \ |
| -- |
| 2.7.4 |
| |
