dedede: Fix the firmware flash programming sequence

When the AP firmware is flashed with AP on (i.e. S0 state), there is a
contention on the SPI lines. This contention prevents the flash ROM from
not getting detected. Hence the AP is expected to be turned off before
the flashing begins. Also some of the rails need to be configured such
that the leakage on the SPI lines are tolerable.

BUG=b:154885210
TEST=Flash the AP firmware using C2D2 and boot the waddledoo mainboard.
Some logs from the EC console ensuring the sequence is followed as
expected:
[2020-05-29 14:32:07] 2020-05-29 14:32:07 > apshutdown
[2020-05-29 14:32:07] 2020-05-29 14:32:07 [31.777820 chipset_force_shutdown() 32774]
<snip>
[2020-05-29 14:32:07] 2020-05-29 14:32:07 [31.832486 power state 0 = G3, in 0x0000]
[2020-05-29 14:32:08] 2020-05-29 14:32:08 [32.922379 charge_request(8512mV, 0mA)]
[2020-05-29 14:32:12] 2020-05-29 14:32:12
[2020-05-29 14:32:12] 2020-05-29 14:32:12 > gpioset en_pp3300_a 1
[2020-05-29 14:32:12] 2020-05-29 14:32:12 > [37.262506 power state 0 = G3, in 0x0020]
[2020-05-29 14:32:12] 2020-05-29 14:32:12 [37.263103 Pass thru GPIO_DSW_PWROK: 1]
[2020-05-29 14:32:13] 2020-05-29 14:32:13 [37.370301 power state 0 = G3, in 0x0028]
[2020-05-29 14:32:13] 2020-05-29 14:32:13 [37.376547 power state 0 = G3, in 0x0038]
[2020-05-29 14:32:13] 2020-05-29 14:32:13 [37.387293 Pass through GPIO_RSMRST_L_PGOOD: 1]
[2020-05-29 14:32:13] 2020-05-29 14:32:13
[2020-05-29 14:32:13] 2020-05-29 14:32:13 > gpioset ec_ap_rsmrst_l 0
[2020-05-29 14:32:13] 2020-05-29 14:32:13 >
[2020-05-29 14:32:13] 2020-05-29 14:32:13 > gpioset ec_ap_rsmrst_l 0
[2020-05-29 14:32:13] 2020-05-29 14:32:13 >

Change-Id: I0967bb1d59add0d6d596c393c5412ea22c2b1119
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/chromite/+/2219296
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Mike Goodey <mgoodey@google.com>
Reviewed-by: Mike Goodey <mgoodey@google.com>
Reviewed-by: Alex Klein <saklein@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Commit-Queue: Kirtika Ruchandani <kirtika@chromium.org>
diff --git a/lib/firmware/ap_firmware_config/dedede.py b/lib/firmware/ap_firmware_config/dedede.py
index b318051..a725185 100644
--- a/lib/firmware/ap_firmware_config/dedede.py
+++ b/lib/firmware/ap_firmware_config/dedede.py
@@ -49,6 +49,19 @@
   dut_control_off = []
   if servo.is_c2d2:
     dut_control_on.append(['ap_flash_select:on'])
+    # Shutdown AP so that it enters G3 state.
+    dut_control_on.append(['ec_uart_cmd:apshutdown'])
+    # Sleep to ensure the SoC rails get chance to discharge enough.
+    dut_control_on.append(['sleep:5'])
+    # Turn on the S5 rails & initiate partial power up.
+    dut_control_on.append(['ec_uart_cmd:gpioset en_pp3300_a 1'])
+    # Sleep to ensure the required delay for device power sequencing.
+    # Require 130 ms between EN_PP3300_A assertion and EC_AP_RSMRST_L assertion.
+    dut_control_on.append(['sleep:0.2'])
+    # Halt the power sequencing by de-asserting EC_AP_RSMRST_L.
+    dut_control_on.append(['ec_uart_cmd:gpioset ec_ap_rsmrst_l 0'])
+    # De-assert again to be on the safe side.
+    dut_control_on.append(['ec_uart_cmd:gpioset ec_ap_rsmrst_l 0'])
     dut_control_on.append(['spi2_vref:pp3300'])
     dut_control_off.append(['spi2_vref:off'])
     dut_control_off.append(['ap_flash_select:off'])