BDEPEND=test? ( sys-apps/grep[pcre] ) >=app-portage/elt-patches-20170815
DEFINED_PHASES=compile prepare test
DEPEND=systemc? ( sci-electronics/systemc ) !<sys-devel/gettext-0.18.1.1-r3 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DESCRIPTION=The fastest Verilog/SystemVerilog simulator
EAPI=7
HOMEPAGE=https://www.veripool.org/verilator/
IUSE=+systemc test
KEYWORDS=*
LICENSE=LGPL-3
RDEPEND=systemc? ( sci-electronics/systemc )
RESTRICT=!test? ( test )
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/20af8a36a77d2b11b0522b214ba95047c16c887b.tar.gz -> verilator-4.212_p20210928.tar.gz
_eclasses_=autotools	d0e5375d47f4c809f406eb892e531513	eutils	fcb2aa98e1948b835b5ae66ca52868c5	flag-o-matic	5d5921a298e95441da2f85be419894c0	libtool	f143db5a74ccd9ca28c1234deffede96	multilib	2477ebe553d3e4d2c606191fe6c33602	toolchain-funcs	528ab0a9e1ee02c57524ad3bede3c57e
_md5_=4664b2c8d7a625293f0a141092e8475e