)]}'
{
  "commit": "17e3f7a0493d18a94debb58047554ee694b5d59a",
  "tree": "c48beeb294e0e0ea7a9c21770a40c301845f45b1",
  "parents": [
    "e769756224bdab3d9e873c9670df2b87b7a75266"
  ],
  "author": {
    "name": "Qiuxu Zhuo",
    "email": "qiuxu.zhuo@intel.com",
    "time": "Fri Jan 13 11:28:00 2023 +0800"
  },
  "committer": {
    "name": "Kevin Berry",
    "email": "kpberry@google.com",
    "time": "Tue Mar 19 19:35:13 2024 +0000"
  },
  "message": "EDAC/i10nm: Add Intel Emerald Rapids server support\n\nBugLink: https://bugs.launchpad.net/bugs/2015372\n\nThe Emerald Rapids CPU model uses similar memory controller registers\nas Sapphire Rapids server. Add Emerald Rapids CPU model number ID for\nEDAC support.\n\nTested-by: Li Zhang \u003cli4.zhang@intel.com\u003e\nSigned-off-by: Qiuxu Zhuo \u003cqiuxu.zhuo@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\nLink: https://lore.kernel.org/all/20230113032802.41752-1-qiuxu.zhuo@intel.com\n\n(cherry picked from commit e4b2bc6616e21f4a7ce4e7452f716e3db8fe66b6)\nSigned-off-by: Roxana Nicolescu \u003croxana.nicolescu@canonical.com\u003e\nAcked-by: Tim Gardner \u003ctim.gardner@canonical.com\u003e\nAcked-by: Cory Todd \u003ccory.todd@canonical.com\u003e\nAcked-by: Andrei Gherzan \u003candrei.gherzan@canonical.com\u003e\nSigned-off-by: Stefan Bader \u003cstefan.bader@canonical.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e0af60833d28c63a29ca525b5f911a71e352ab3b",
      "old_mode": 33188,
      "old_path": "drivers/edac/i10nm_base.c",
      "new_id": "84920b22140fd2ffddcc9a7ad0dc4063b8e9c7da",
      "new_mode": 33188,
      "new_path": "drivers/edac/i10nm_base.c"
    }
  ]
}