| commit | 614348676cb945b8dfccaa37cff491880be01277 | [log] [tgz] |
|---|---|---|
| author | Clément Péron <peron.clem@gmail.com> | Tue Oct 09 13:28:37 2018 +0200 |
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | Fri Dec 13 08:52:08 2019 +0100 |
| tree | 2cba51c5553e08dcb3c607764154be5d6104cd68 | |
| parent | 3b0107ca80fbd03991ad568ef14fe13199703592 [diff] |
ARM: debug: enable UART1 for socfpga Cyclone5 [ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ] Cyclone5 and Arria10 doesn't have the same memory map for UART1. Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>