// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Google Veyron Minnie Rev 0+ board device tree source
 *
 * Copyright 2015 Google, Inc
 */

/dts-v1/;
#include "rk3288-veyron-chromebook.dtsi"

/ {
	model = "Google Minnie";
	compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
		     "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
		     "google,veyron-minnie-rev0", "google,veyron-minnie",
		     "google,veyron", "rockchip,rk3288";

	volume_buttons: volume-buttons {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&volum_down_l &volum_up_l>;

		volum_down {
			label = "Volum_down";
			gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
			debounce-interval = <100>;
		};

		volum_up {
			label = "Volum_up";
			gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
			debounce-interval = <100>;
		};
	};
};

&backlight {
	/* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
	brightness-levels = <
			  0   3   4   5   6   7
			  8   9  10  11  12  13  14  15
			 16  17  18  19  20  21  22  23
			 24  25  26  27  28  29  30  31
			 32  33  34  35  36  37  38  39
			 40  41  42  43  44  45  46  47
			 48  49  50  51  52  53  54  55
			 56  57  58  59  60  61  62  63
			 64  65  66  67  68  69  70  71
			 72  73  74  75  76  77  78  79
			 80  81  82  83  84  85  86  87
			 88  89  90  91  92  93  94  95
			 96  97  98  99 100 101 102 103
			104 105 106 107 108 109 110 111
			112 113 114 115 116 117 118 119
			120 121 122 123 124 125 126 127
			128 129 130 131 132 133 134 135
			136 137 138 139 140 141 142 143
			144 145 146 147 148 149 150 151
			152 153 154 155 156 157 158 159
			160 161 162 163 164 165 166 167
			168 169 170 171 172 173 174 175
			176 177 178 179 180 181 182 183
			184 185 186 187 188 189 190 191
			192 193 194 195 196 197 198 199
			200 201 202 203 204 205 206 207
			208 209 210 211 212 213 214 215
			216 217 218 219 220 221 222 223
			224 225 226 227 228 229 230 231
			232 233 234 235 236 237 238 239
			240 241 242 243 244 245 246 247
			248 249 250 251 252 253 254 255>;
};

&i2c_tunnel {
	battery: bq27500@55 {
		compatible = "ti,bq27500";
		reg = <0x55>;
	};
};

&i2c3 {
	status = "okay";

	clock-frequency = <400000>;
	i2c-scl-falling-time-ns = <50>;
	i2c-scl-rising-time-ns = <300>;

	touchscreen@10 {
		compatible = "elan,ekth3500";
		reg = <0x10>;
		interrupt-parent = <&gpio2>;
		interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-names = "default";
		pinctrl-0 = <&touch_int &touch_rst>;
		reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
		vcc33-supply = <&vcc33_touch>;
		vccio-supply = <&vcc33_touch>;
	};
};

&panel {
	compatible = "auo,b101ean01", "simple-panel";

	/delete-node/ panel-timing;

	panel-timing {
		clock-frequency = <66666667>;
		hactive = <1280>;
		hfront-porch = <18>;
		hback-porch = <21>;
		hsync-len = <32>;
		vactive = <800>;
		vfront-porch = <4>;
		vback-porch = <8>;
		vsync-len = <18>;
	};
};

&rk808 {
	pinctrl-names = "default";
	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;

	regulators {
		vcc33_touch: LDO_REG2 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-name = "vcc33_touch";
			regulator-state-mem {
				regulator-off-in-suspend;
			};
		};

		vcc5v_touch: SWITCH_REG2 {
			regulator-name = "vcc5v_touch";
			regulator-state-mem {
				regulator-off-in-suspend;
			};
		};
	};
};

&sdmmc {
	disable-wp;
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
			&sdmmc_bus4>;
};

&vcc_5v {
	enable-active-high;
	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&drv_5v>;
};

&vcc50_hdmi {
	enable-active-high;
	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&vcc50_hdmi_en>;
};

&gpio0 {
	gpio-line-names = "PMIC_SLEEP_AP",
			  "DDRIO_PWROFF",
			  "DDRIO_RETEN",
			  "TS3A227E_INT_L",
			  "PMIC_INT_L",
			  "PWR_KEY_L",
			  "AP_LID_INT_L",
			  "EC_IN_RW",

			  "AC_PRESENT_AP",
			  /*
			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
			   * it REC_MODE_L.
			   */
			  "RECOVERY_SW_L",
			  "OTP_OUT",
			  "HOST1_PWR_EN",
			  "USBOTG_PWREN_H",
			  "AP_WARM_RESET_H",
			  "nFALUT2",
			  "I2C0_SDA_PMIC",

			  "I2C0_SCL_PMIC",
			  "SUSPEND_L",
			  "USB_INT";
};

&gpio2 {
	gpio-line-names = "CONFIG0",
			  "CONFIG1",
			  "CONFIG2",
			  "",
			  "",
			  "",
			  "",
			  "CONFIG3",

			  "PROCHOT#",
			  "EMMC_RST_L",
			  "",
			  "",
			  "BL_PWR_EN",
			  "AVDD_1V8_DISP_EN",
			  "TOUCH_INT",
			  "TOUCH_RST",

			  "I2C3_SCL_TP",
			  "I2C3_SDA_TP";
};

&gpio3 {
	gpio-line-names = "FLASH0_D0",
			  "FLASH0_D1",
			  "FLASH0_D2",
			  "FLASH0_D3",
			  "FLASH0_D4",
			  "FLASH0_D5",
			  "FLASH0_D6",
			  "FLASH0_D7",

			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",

			  "FLASH0_CS2/EMMC_CMD",
			  "",
			  "FLASH0_DQS/EMMC_CLKO";
};

&gpio4 {
	gpio-line-names = "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",

			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",

			  "UART0_RXD",
			  "UART0_TXD",
			  "UART0_CTS",
			  "UART0_RTS",
			  "SDIO0_D0",
			  "SDIO0_D1",
			  "SDIO0_D2",
			  "SDIO0_D3",

			  "SDIO0_CMD",
			  "SDIO0_CLK",
			  "dev_wake",
			  "",
			  "WIFI_ENABLE_H",
			  "BT_ENABLE_L",
			  "WIFI_HOST_WAKE",
			  "BT_HOST_WAKE";
};

&gpio5 {
	gpio-line-names = "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",

			  "",
			  "",
			  "Volum_Up#",
			  "Volum_Down#",
			  "SPI0_CLK",
			  "SPI0_CS0",
			  "SPI0_TXD",
			  "SPI0_RXD",

			  "",
			  "",
			  "",
			  "VCC50_HDMI_EN";
};

&gpio6 {
	gpio-line-names = "I2S0_SCLK",
			  "I2S0_LRCK_RX",
			  "I2S0_LRCK_TX",
			  "I2S0_SDI",
			  "I2S0_SDO0",
			  "HP_DET_H",
			  "",
			  "INT_CODEC",

			  "I2S0_CLK",
			  "I2C2_SDA",
			  "I2C2_SCL",
			  "MICDET",
			  "",
			  "",
			  "",
			  "",

			  "SDMMC_D0",
			  "SDMMC_D1",
			  "SDMMC_D2",
			  "SDMMC_D3",
			  "SDMMC_CLK",
			  "SDMMC_CMD";
};

&gpio7 {
	gpio-line-names = "LCDC_BL",
			  "PWM_LOG",
			  "BL_EN",
			  "TRACKPAD_INT",
			  "TPM_INT_H",
			  "SDMMC_DET_L",
			  /*
			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
			   * it FW_WP_AP.
			   */
			  "AP_FLASH_WP_L",
			  "EC_INT",

			  "CPU_NMI",
			  "DVS_OK",
			  "SDMMC_WP",
			  "EDP_HPD",
			  "DVS1",
			  "nFALUT1",
			  "LCD_EN",
			  "DVS2",

			  "VCC5V_GOOD_H",
			  "I2C4_SDA_TP",
			  "I2C4_SCL_TP",
			  "I2C5_SDA_HDMI",
			  "I2C5_SCL_HDMI",
			  "5V_DRV",
			  "UART2_RXD",
			  "UART2_TXD";
};

&gpio8 {
	gpio-line-names = "RAM_ID0",
			  "RAM_ID1",
			  "RAM_ID2",
			  "RAM_ID3",
			  "I2C1_SDA_TPM",
			  "I2C1_SCL_TPM",
			  "SPI2_CLK",
			  "SPI2_CS0",

			  "SPI2_RXD",
			  "SPI2_TXD";
};

&pinctrl {
	buck-5v {
		drv_5v: drv-5v {
			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	buttons {
		volum_down_l: volum-down-l {
			rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
		};

		volum_up_l: volum-up-l {
			rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	hdmi {
		vcc50_hdmi_en: vcc50-hdmi-en {
			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	pmic {
		dvs_1: dvs-1 {
			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
		};

		dvs_2: dvs-2 {
			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
		};
	};

	prochot {
		gpio_prochot: gpio-prochot {
			rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	touchscreen {
		touch_int: touch-int {
			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		touch_rst: touch-rst {
			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};