)]}'
{
  "commit": "614348676cb945b8dfccaa37cff491880be01277",
  "tree": "2cba51c5553e08dcb3c607764154be5d6104cd68",
  "parents": [
    "3b0107ca80fbd03991ad568ef14fe13199703592"
  ],
  "author": {
    "name": "Clément Péron",
    "email": "peron.clem@gmail.com",
    "time": "Tue Oct 09 13:28:37 2018 +0200"
  },
  "committer": {
    "name": "Greg Kroah-Hartman",
    "email": "gregkh@linuxfoundation.org",
    "time": "Fri Dec 13 08:52:08 2019 +0100"
  },
  "message": "ARM: debug: enable UART1 for socfpga Cyclone5\n\n[ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ]\n\nCyclone5 and Arria10 doesn\u0027t have the same memory map for UART1.\n\nSplit the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.\n\nSigned-off-by: Clément Péron \u003cperon.clem@gmail.com\u003e\nSigned-off-by: Dinh Nguyen \u003cdinguyen@kernel.org\u003e\nSigned-off-by: Sasha Levin \u003csashal@kernel.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f95a90dfc282af4f912ffd38fd188b555903b892",
      "old_mode": 33188,
      "old_path": "arch/arm/Kconfig.debug",
      "new_id": "bee0ba1d1cfb721255ab7736cd98f1faadcdb506",
      "new_mode": 33188,
      "new_path": "arch/arm/Kconfig.debug"
    }
  ]
}