x86: Provide a way to throttle port80 accesses
Some systems (like Google Link device) provide the ability to keep a
history of the target CPU port80 accesses, which is extremely handy
for debugging. The problem is that the EC handling port 80 access is
orders of magnitude slower than the AP. This causes random loss of
trace data.
This change allows to throttle port 80 accesses such that in case the
AP is trying to post faster than the EC can handle, a delay is
introduced to make sure that the post rate is throttled. Experiments
have shown that on Link the delay should be at least 350,000 of tsc
clocks.
Throttling is not being enabled by default: to enable it one would
have to set MIN_PORT80_KCLOCKS_DELAY to something like 400 and rebuild
the u-boot image. With upcoming EC code optimizations this number
could be decreased (new new value should be established
experimentally).
BRANCH=none
BUG=chrome-os-partner:13819
TEST=manual
. set MIN_PORT80_KCLOCKS_DELAY to 400, and add the following code
snippet to the beginning of common/main.c:main_loop()
{
int i;
for (i = 0; i < 256; i++)
show_boot_progress(i);
while(1);
}
. build a firmware image
. program firmware on a Link device with the EC console connected
and reboot the device
. once the device boots up examine port80 trace on the EC console,
it should be showing all 256 recent accesses
. restore arch/x86/cpu/coreboot/coreboot.c to set
MIN_PORT80_KCLOCKS_DELAY to 0, rebuild the firmware and program
it on the Link device and reboot it
. once the device boots up examine port80 trace on the EC console,
it shows only a few most recent accesses: '03 76 cb ff'
Change-Id: Ic874f91447b222b993b3fd3044d48d7fa1d40b64
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/33546
Reviewed-by: Simon Glass <sjg@chromium.org>
1 file changed
