tree 458a38b29467c0b17552620fbf30fa6687df90ec
parent 507b577b1560c7f34ad7f7a1273219d02a3e0c76
author Sooi, Li Cheng <li.cheng.sooi@intel.com> 1483521771 +0800
committer chrome-bot <chrome-bot@chromium.org> 1484867685 -0800

UPSTREAM: soc/intel/skylake: Add SATA interrupt for APIC mode

Add SATA interrupt for APIC mode

BUG=none
BRANCH=none
TEST=none

Change-Id: Ied09c5580cb3ce3ac4673c4191e58462ff585c41
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 951ec96f17100692daed8c5316ffa13a7ed387d9
Original-Change-Id: I9e0682e235715399da2c585174925c89b9116ab3
Original-Signed-off-by: Sooi, Li Cheng <li.cheng.sooi@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18130
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/430734